; /\\\\\\\\\ ; /\\\///////\\\ ; \/\\\ \/\\\ /\\\ /\\\ ; \/\\\\\\\\\\\/ /\\\\\ /\\\\\\\\\\ /\\\\\\\\ /\\\\\\\\\\\ /\\\\\\\\\\\ /\\\\\\\\\ ; \/\\\//////\\\ /\\\///\\\ \/\\\////// /\\\/////\\\ \////\\\//// \////\\\//// \////////\\\ ; \/\\\ \//\\\ /\\\ \//\\\ \/\\\\\\\\\\ /\\\\\\\\\\\ \/\\\ \/\\\ /\\\\\\\\\\ ; \/\\\ \//\\\ \//\\\ /\\\ \////////\\\ \//\\/////// \/\\\ /\\ \/\\\ /\\ /\\\/////\\\ ; \/\\\ \//\\\ \///\\\\\/ /\\\\\\\\\\ \//\\\\\\\\\\ \//\\\\\ \//\\\\\ \//\\\\\\\\/\\ ; \/// \/// \///// \////////// \////////// \///// \///// \////////\// ; Let's find out together what makes a PIC Tick! ; ; Code Produced by the Positron8 Compiler. Version 4.0.1.0 ; Created and Written by Les Johnson. ; Compiler version for Godfried-Willem Raes ;---------------------------------------------------------- ; #define config_req 1 #define debug_req 1 LIST P = 18F4620, F = INHX32, W = 2, X = ON, R = DEC, MM = ON, N = 0, C = 255, T = ON ; MICROCONTROLLER'S SFRS ; START OF ACCESS SFRS PORTA equ 0X0F80 PORTB equ 0X0F81 PORTC equ 0X0F82 PORTD equ 0X0F83 PORTE equ 0X0F84 LATA equ 0X0F89 LATB equ 0X0F8A LATC equ 0X0F8B LATD equ 0X0F8C LATE equ 0X0F8D DDRA equ 0X0F92 TRISA equ 0X0F92 DDRB equ 0X0F93 TRISB equ 0X0F93 DDRC equ 0X0F94 TRISC equ 0X0F94 DDRD equ 0X0F95 TRISD equ 0X0F95 DDRE equ 0X0F96 TRISE equ 0X0F96 OSCTUNE equ 0X0F9B PIE1 equ 0X0F9D PIR1 equ 0X0F9E IPR1 equ 0X0F9F PIE2 equ 0X0FA0 PIR2 equ 0X0FA1 IPR2 equ 0X0FA2 EECON1 equ 0X0FA6 EECON2 equ 0X0FA7 EEDATL equ 0X0FA8 EEDATA equ 0X0FA8 EEADR equ 0X0FA9 EEADRH equ 0X0FAA RCSTA equ 0X0FAB TXSTA equ 0X0FAC TXREG equ 0X0FAD RCREG equ 0X0FAE SPBRG equ 0X0FAF SPBRGH equ 0X0FB0 T3CON equ 0X0FB1 TMR3L equ 0X0FB2 TMR3LH equ 0X0FB3 TMR3H equ 0X0FB3 CMCON equ 0X0FB4 CVRCON equ 0X0FB5 ECCP1AS equ 0X0FB6 PWM1CON equ 0X0FB7 BAUDCON equ 0X0FB8 BAUDCTL equ 0X0FB8 CCP2CON equ 0X0FBA CCPR2 equ 0X0FBB CCPR2L equ 0X0FBB CCPR2LH equ 0X0FBC CCPR2H equ 0X0FBC CCP1CON equ 0X0FBD CCPR1 equ 0X0FBE CCPR1L equ 0X0FBE CCPR1LH equ 0X0FBF CCPR1H equ 0X0FBF ADCON2 equ 0X0FC0 ADCON1 equ 0X0FC1 ADCON0 equ 0X0FC2 ADRES equ 0X0FC3 ADRESL equ 0X0FC3 ADRESLH equ 0X0FC4 ADRESH equ 0X0FC4 SSPCON2 equ 0X0FC5 SSPCON1 equ 0X0FC6 SSPSTAT equ 0X0FC7 SSPADD equ 0X0FC8 SSPBUF equ 0X0FC9 T2CON equ 0X0FCA PR2 equ 0X0FCB TMR2 equ 0X0FCC T1CON equ 0X0FCD TMR1L equ 0X0FCE TMR1LH equ 0X0FCF TMR1H equ 0X0FCF RCON equ 0X0FD0 WDTCON equ 0X0FD1 HLVDCON equ 0X0FD2 LVDCON equ 0X0FD2 OSCCON equ 0X0FD3 DEBUG equ 0X0FD4 T0CON equ 0X0FD5 TMR0L equ 0X0FD6 TMR0LH equ 0X0FD7 TMR0H equ 0X0FD7 STATUS equ 0X0FD8 FSR2L equ 0X0FD9 FSR2LH equ 0X0FDA FSR2H equ 0X0FDA PLUSW2 equ 0X0FDB PREINC2 equ 0X0FDC POSTDEC2 equ 0X0FDD POSTINC2 equ 0X0FDE INDF2 equ 0X0FDF BSR equ 0X0FE0 FSR1L equ 0X0FE1 FSR1LH equ 0X0FE2 FSR1H equ 0X0FE2 PLUSW1 equ 0X0FE3 PREINC1 equ 0X0FE4 POSTDEC1 equ 0X0FE5 POSTINC1 equ 0X0FE6 INDF1 equ 0X0FE7 WREG equ 0X0FE8 FSR0L equ 0X0FE9 FSR0LH equ 0X0FEA FSR0H equ 0X0FEA PLUSW0 equ 0X0FEB PREINC0 equ 0X0FEC POSTDEC0 equ 0X0FED POSTINC0 equ 0X0FEE INDF0 equ 0X0FEF INTCON3 equ 0X0FF0 INTCON2 equ 0X0FF1 INTCON equ 0X0FF2 PRODL equ 0X0FF3 PRODLH equ 0X0FF4 PRODH equ 0X0FF4 TABLAT equ 0X0FF5 TBLPTRL equ 0X0FF6 TBLPTRLH equ 0X0FF7 TBLPTRH equ 0X0FF7 TBLPTRU equ 0X0FF8 TBLPTRLHH equ 0X0FF8 PC equ 0X0FF9 PCL equ 0X0FF9 PCLATH equ 0X0FFA PCLATU equ 0X0FFB STKPTR equ 0X0FFC TOS equ 0X0FFD TOSL equ 0X0FFD TOSLH equ 0X0FFE TOSH equ 0X0FFE TOSU equ 0X0FFF ; I2C PINS USED BY HBUSIN AND HBUSOUT _I2C_SCL_port=TRISC _I2C_SCL_pin=3 _I2C_SDA_port=TRISC _I2C_SDA_pin=4 ; SFR BITS USED INTERNALLY BY THE COMPILER C=0 DC=1 Z=2 OV=3 N=4 PD=5 To=6 PP_RD0=0 PP_RD1=1 PP_RD2=2 PP_RD3=3 PP_RD4=4 PP_RD5=5 PP_RD6=6 PP_RD7=7 PP_RD=0 PP_WR=1 PP_TXIF=4 PP_RCIF=5 PP_WREN=2 PP_WRERR=3 PP_EEPGD=7 PP_OERR=1 PP_CREN=4 PP_BRGH=2 PP_SENDB=3 PP_T3CCP1=3 PP_T3CCP2=6 PP_RD16=7 PP_BRG16=3 PP_ADON=0 PP_GO_DONE=1 PP_SEN=0 PP_RSEN=1 PP_PEN=2 PP_RCEN=3 PP_ACKEN=4 PP_ACKDT=5 PP_R_W=2 PP_T2CKPS0=0 PP_T2CKPS1=1 PP_TMR2ON=2 PP_TMR1ON=0 PP_RBPU=7 ; MEMORY MAP OF THE DEVICE __MAXRAM 0X0FFF __BADRAM 0X0F85-0X0F88 __BADRAM 0X0F8E-0X0F91 __BADRAM 0X0F97-0X0F9A __BADRAM 0X0F9C __BADRAM 0X0FA3-0X0FA5 __BADRAM 0X0FB9 ; CONFIG FUSE NAME VALUES config1h equ 0X300001 config2l equ 0X300002 config2h equ 0X300003 config3h equ 0X300005 config4l equ 0X300006 config5l equ 0X300008 config5h equ 0X300009 config6l equ 0X30000A config6h equ 0X30000B config7l equ 0X30000C config7h equ 0X30000D OSC_LP_1 equ 0XF0 OSC_XT_1 equ 0XF1 OSC_HS_1 equ 0XF2 OSC_RC_1 equ 0XF3 OSC_EC_1 equ 0XF4 OSC_ECIO6_1 equ 0XF5 OSC_HSPLL_1 equ 0XF6 OSC_RCIO6_1 equ 0XF7 OSC_INTIO67_1 equ 0XF8 OSC_INTIO7_1 equ 0XF9 FCMEN_OFF_1 equ 0XBF FCMEN_ON_1 equ 0xFF IESO_OFF_1 equ 0X7F IESO_ON_1 equ 0xFF PWRT_ON_2 equ 0XFE PWRT_OFF_2 equ 0xFF BOREN_OFF_2 equ 0XF9 BOREN_ON_2 equ 0XFB BOREN_NOSLP_2 equ 0XFD BOREN_SBORDIS_2 equ 0xFF BORV_0_2 equ 0XE7 BORV_1_2 equ 0XEF BORV_2_2 equ 0XF7 BORV_3_2 equ 0xFF WDT_OFF_2 equ 0XFE WDT_ON_2 equ 0xFF WDTPS_1_2 equ 0XE1 WDTPS_2_2 equ 0XE3 WDTPS_4_2 equ 0XE5 WDTPS_8_2 equ 0XE7 WDTPS_16_2 equ 0XE9 WDTPS_32_2 equ 0XEB WDTPS_64_2 equ 0XED WDTPS_128_2 equ 0XEF WDTPS_256_2 equ 0XF1 WDTPS_512_2 equ 0XF3 WDTPS_1024_2 equ 0XF5 WDTPS_2048_2 equ 0XF7 WDTPS_4096_2 equ 0XF9 WDTPS_8192_2 equ 0XFB WDTPS_16384_2 equ 0XFD WDTPS_32768_2 equ 0xFF MCLRE_OFF_3 equ 0X7F MCLRE_ON_3 equ 0xFF LPT1OSC_OFF_3 equ 0XFB LPT1OSC_ON_3 equ 0xFF PBADEN_OFF_3 equ 0XFD PBADEN_ON_3 equ 0xFF CCP2MX_PORTBE_3 equ 0XFE CCP2MX_PORTC_3 equ 0xFF STVREN_OFF_4 equ 0XFE STVREN_ON_4 equ 0xFF LVP_OFF_4 equ 0XFB LVP_ON_4 equ 0xFF XINST_OFF_4 equ 0XBF XINST_ON_4 equ 0xFF DEBUG_ON_4 equ 0X7F DEBUG_OFF_4 equ 0xFF CP0_ON_5 equ 0XFE CP0_OFF_5 equ 0xFF CP1_ON_5 equ 0XFD CP1_OFF_5 equ 0xFF CP2_ON_5 equ 0XFB CP2_OFF_5 equ 0xFF CP3_ON_5 equ 0XF7 CP3_OFF_5 equ 0xFF CPB_ON_5 equ 0XBF CPB_OFF_5 equ 0xFF CPD_ON_5 equ 0X7F CPD_OFF_5 equ 0xFF WRT0_ON_6 equ 0XFE WRT0_OFF_6 equ 0xFF WRT1_ON_6 equ 0XFD WRT1_OFF_6 equ 0xFF WRT2_ON_6 equ 0XFB WRT2_OFF_6 equ 0xFF WRT3_ON_6 equ 0XF7 WRT3_OFF_6 equ 0xFF WRTB_ON_6 equ 0XBF WRTB_OFF_6 equ 0xFF WRTC_ON_6 equ 0XDF WRTC_OFF_6 equ 0xFF WRTD_ON_6 equ 0X7F WRTD_OFF_6 equ 0xFF EBTR0_ON_7 equ 0XFE EBTR0_OFF_7 equ 0xFF EBTR1_ON_7 equ 0XFD EBTR1_OFF_7 equ 0xFF EBTR2_ON_7 equ 0XFB EBTR2_OFF_7 equ 0xFF EBTR3_ON_7 equ 0XF7 EBTR3_OFF_7 equ 0xFF EBTRB_ON_7 equ 0XBF EBTRB_OFF_7 equ 0xFF DEVID1 equ 0X3FFFFE DEVID2 equ 0X3FFFFF ; COMPILER'S INTERNAL CONSTANTS AND ALIASES #define __18F4620 1 #define xtal 40 #define _core 16 #define _MaxRAM 3955 #define _Ram_End 0X0F7F #define _MaxMem 0X010000 #define _ADC 13 #define _ADC_res 10 #define _eeprom 1024 #define ram_banks 15 #define _USART 1 #define _USB 0 #define _flash 1 #define _cwrite_block 64 #define _TRIS_offset 18 #define __EE_RW_type 1 #define __MSSP_type 1 #define __HPWM_type 1 #define __adin_type 1 #define __UART_type 1 #define BankA_Start 0x00 #define BankA_End 0X7F #define __Interrupts_Enabled 1 #define __high_interrupts_enabled 1 #define __low_interrupts_enabled 1 #define clrw clrf WREG #define negw negf WREG #define skpc btfss STATUS,0 #define skpnc btfsc STATUS,0 #define clrc bcf STATUS,0 #define setc bsf STATUS,0 #define skpz btfss STATUS,2 #define skpnz btfsc STATUS,2 #define clrz bcf STATUS,2 #define setz bsf STATUS,2 #define INIT_USART_INTERRUPT#REQ 1 #define CLEAR_SERIAL_BUFFER#REQ 1 ; COMPILER SYSTEM VARIABLES BPF equ 0x00 BPFH equ 0X01 PBS_VAR0 equ 0X02 PBS_VAR0H equ 0X03 PBS_VAR0HH equ 0X04 PBS_VAR0HHH equ 0X05 PBS_VAR1 equ 0X06 PBS_VAR1H equ 0X07 PBS_VAR2 equ 0X08 PP0 equ 0X09 PP0H equ 0X0A PP1 equ 0X0B PP1H equ 0X0C PP3H equ 0X0D PP4 equ 0X0E PPZ equ 0X0F PP_AARG equ 0X10 PP_AARGH equ 0X11 PP_AARGHH equ 0X12 PP_AARGHHH equ 0X13 PP_BARG equ 0X14 PP_BARGH equ 0X15 PP_BARGHH equ 0X16 PP_BARGHHH equ 0X17 _AEXP equ 0X18 _BEXP equ 0X19 _FP_FLAGS equ 0X1A _FP_SIGN equ 0X1B _FP_TEMP equ 0X1C ; USER ACCESS RAM VARIABLES Cnt equ 0X1D CntH equ 0X1E CntHH equ 0X1F CntHHH equ 0X20 Bytein equ 0X21 _I equ 0X22 statusbyte equ 0X23 noteUit equ 0X24 release equ 0X25 noteAan equ 0X26 velo equ 0X27 Ctrl equ 0X28 value equ 0X29 prog equ 0X2A CC66 equ 0X2B Nxt equ 0X2C NxtH equ 0X2D NxtHH equ 0X2E NxtHHH equ 0X2F idx equ 0X30 MidiIn equ 0X31 USART_FSR1_Save equ 0X32 USART_FSR1_SaveH equ 0X33 IndexIn equ 0X34 IndexOut equ 0X35 ; STANDARD VARIABLES notePres equ 0X36 pres equ 0X37 CC69 equ 0X38 klep equ 0X39 playing_note equ 0X3A old_note equ 0X3B TimVals equ 0X3C TimValsH equ 0X3D TimValsHH equ 0X3E TimValsHHH equ 0X3F variable TimVals#0=0X3C,TimVals#0H=0X3D,TimVals#0HH=0X3E,TimVals#0HHH=0X3F variable TimVals#1=0X40,TimVals#1H=0X41,TimVals#1HH=0X42,TimVals#1HHH=0X43 variable TimVals#2=0X44,TimVals#2H=0X45,TimVals#2HH=0X46,TimVals#2HHH=0X47 Ringbuffer equ 0X48 variable Ringbuffer#0=0X48,Ringbuffer#1=0X49,Ringbuffer#2=0X4A,Ringbuffer#3=0X4B variable Ringbuffer#4=0X4C,Ringbuffer#5=0X4D,Ringbuffer#6=0X4E,Ringbuffer#7=0X4F variable Ringbuffer#8=0X50,Ringbuffer#9=0X51,Ringbuffer#10=0X52,Ringbuffer#11=0X53 variable Ringbuffer#12=0X54,Ringbuffer#13=0X55,Ringbuffer#14=0X56,Ringbuffer#15=0X57 variable Ringbuffer#16=0X58,Ringbuffer#17=0X59,Ringbuffer#18=0X5A,Ringbuffer#19=0X5B variable Ringbuffer#20=0X5C,Ringbuffer#21=0X5D,Ringbuffer#22=0X5E,Ringbuffer#23=0X5F variable Ringbuffer#24=0X60,Ringbuffer#25=0X61,Ringbuffer#26=0X62,Ringbuffer#27=0X63 variable Ringbuffer#28=0X64,Ringbuffer#29=0X65,Ringbuffer#30=0X66,Ringbuffer#31=0X67 variable Ringbuffer#32=0X68,Ringbuffer#33=0X69,Ringbuffer#34=0X6A,Ringbuffer#35=0X6B variable Ringbuffer#36=0X6C,Ringbuffer#37=0X6D,Ringbuffer#38=0X6E,Ringbuffer#39=0X6F variable Ringbuffer#40=0X70,Ringbuffer#41=0X71,Ringbuffer#42=0X72,Ringbuffer#43=0X73 variable Ringbuffer#44=0X74,Ringbuffer#45=0X75,Ringbuffer#46=0X76,Ringbuffer#47=0X77 variable Ringbuffer#48=0X78,Ringbuffer#49=0X79,Ringbuffer#50=0X7A,Ringbuffer#51=0X7B variable Ringbuffer#52=0X7C,Ringbuffer#53=0X7D,Ringbuffer#54=0X7E,Ringbuffer#55=0X7F variable Ringbuffer#56=0X80,Ringbuffer#57=0X81,Ringbuffer#58=0X82,Ringbuffer#59=0X83 variable Ringbuffer#60=0X84,Ringbuffer#61=0X85,Ringbuffer#62=0X86,Ringbuffer#63=0X87 variable Ringbuffer#64=0X88,Ringbuffer#65=0X89,Ringbuffer#66=0X8A,Ringbuffer#67=0X8B variable Ringbuffer#68=0X8C,Ringbuffer#69=0X8D,Ringbuffer#70=0X8E,Ringbuffer#71=0X8F variable Ringbuffer#72=0X90,Ringbuffer#73=0X91,Ringbuffer#74=0X92,Ringbuffer#75=0X93 variable Ringbuffer#76=0X94,Ringbuffer#77=0X95,Ringbuffer#78=0X96,Ringbuffer#79=0X97 variable Ringbuffer#80=0X98,Ringbuffer#81=0X99,Ringbuffer#82=0X9A,Ringbuffer#83=0X9B variable Ringbuffer#84=0X9C,Ringbuffer#85=0X9D,Ringbuffer#86=0X9E,Ringbuffer#87=0X9F variable Ringbuffer#88=0XA0,Ringbuffer#89=0XA1,Ringbuffer#90=0XA2,Ringbuffer#91=0XA3 variable Ringbuffer#92=0XA4,Ringbuffer#93=0XA5,Ringbuffer#94=0XA6,Ringbuffer#95=0XA7 variable Ringbuffer#96=0XA8,Ringbuffer#97=0XA9,Ringbuffer#98=0XAA,Ringbuffer#99=0XAB variable Ringbuffer#100=0XAC,Ringbuffer#101=0XAD,Ringbuffer#102=0XAE,Ringbuffer#103=0XAF variable Ringbuffer#104=0XB0,Ringbuffer#105=0XB1,Ringbuffer#106=0XB2,Ringbuffer#107=0XB3 variable Ringbuffer#108=0XB4,Ringbuffer#109=0XB5,Ringbuffer#110=0XB6,Ringbuffer#111=0XB7 variable Ringbuffer#112=0XB8,Ringbuffer#113=0XB9,Ringbuffer#114=0XBA,Ringbuffer#115=0XBB variable Ringbuffer#116=0XBC,Ringbuffer#117=0XBD,Ringbuffer#118=0XBE,Ringbuffer#119=0XBF variable Ringbuffer#120=0XC0,Ringbuffer#121=0XC1,Ringbuffer#122=0XC2,Ringbuffer#123=0XC3 variable Ringbuffer#124=0XC4,Ringbuffer#125=0XC5,Ringbuffer#126=0XC6,Ringbuffer#127=0XC7 variable Ringbuffer#128=0XC8,Ringbuffer#129=0XC9,Ringbuffer#130=0XCA,Ringbuffer#131=0XCB variable Ringbuffer#132=0XCC,Ringbuffer#133=0XCD,Ringbuffer#134=0XCE,Ringbuffer#135=0XCF variable Ringbuffer#136=0XD0,Ringbuffer#137=0XD1,Ringbuffer#138=0XD2,Ringbuffer#139=0XD3 variable Ringbuffer#140=0XD4,Ringbuffer#141=0XD5,Ringbuffer#142=0XD6,Ringbuffer#143=0XD7 variable Ringbuffer#144=0XD8,Ringbuffer#145=0XD9,Ringbuffer#146=0XDA,Ringbuffer#147=0XDB variable Ringbuffer#148=0XDC,Ringbuffer#149=0XDD,Ringbuffer#150=0XDE,Ringbuffer#151=0XDF variable Ringbuffer#152=0XE0,Ringbuffer#153=0XE1,Ringbuffer#154=0XE2,Ringbuffer#155=0XE3 variable Ringbuffer#156=0XE4,Ringbuffer#157=0XE5,Ringbuffer#158=0XE6,Ringbuffer#159=0XE7 variable Ringbuffer#160=0XE8,Ringbuffer#161=0XE9,Ringbuffer#162=0XEA,Ringbuffer#163=0XEB variable Ringbuffer#164=0XEC,Ringbuffer#165=0XED,Ringbuffer#166=0XEE,Ringbuffer#167=0XEF variable Ringbuffer#168=0XF0,Ringbuffer#169=0XF1,Ringbuffer#170=0XF2,Ringbuffer#171=0XF3 variable Ringbuffer#172=0XF4,Ringbuffer#173=0XF5,Ringbuffer#174=0XF6,Ringbuffer#175=0XF7 variable Ringbuffer#176=0XF8,Ringbuffer#177=0XF9,Ringbuffer#178=0XFA,Ringbuffer#179=0XFB variable Ringbuffer#180=0XFC,Ringbuffer#181=0XFD,Ringbuffer#182=0XFE,Ringbuffer#183=0xFF variable Ringbuffer#184=0X100,Ringbuffer#185=0X101,Ringbuffer#186=0X102,Ringbuffer#187=0X103 variable Ringbuffer#188=0X104,Ringbuffer#189=0X105,Ringbuffer#190=0X106,Ringbuffer#191=0X107 variable Ringbuffer#192=0X108,Ringbuffer#193=0X109,Ringbuffer#194=0X10A,Ringbuffer#195=0X10B variable Ringbuffer#196=0X10C,Ringbuffer#197=0X10D,Ringbuffer#198=0X10E,Ringbuffer#199=0X10F variable Ringbuffer#200=0X110,Ringbuffer#201=0X111,Ringbuffer#202=0X112,Ringbuffer#203=0X113 variable Ringbuffer#204=0X114,Ringbuffer#205=0X115,Ringbuffer#206=0X116,Ringbuffer#207=0X117 variable Ringbuffer#208=0X118,Ringbuffer#209=0X119,Ringbuffer#210=0X11A,Ringbuffer#211=0X11B variable Ringbuffer#212=0X11C,Ringbuffer#213=0X11D,Ringbuffer#214=0X11E,Ringbuffer#215=0X11F variable Ringbuffer#216=0X120,Ringbuffer#217=0X121,Ringbuffer#218=0X122,Ringbuffer#219=0X123 variable Ringbuffer#220=0X124,Ringbuffer#221=0X125,Ringbuffer#222=0X126,Ringbuffer#223=0X127 variable Ringbuffer#224=0X128,Ringbuffer#225=0X129,Ringbuffer#226=0X12A,Ringbuffer#227=0X12B variable Ringbuffer#228=0X12C,Ringbuffer#229=0X12D,Ringbuffer#230=0X12E,Ringbuffer#231=0X12F variable Ringbuffer#232=0X130,Ringbuffer#233=0X131,Ringbuffer#234=0X132,Ringbuffer#235=0X133 variable Ringbuffer#236=0X134,Ringbuffer#237=0X135,Ringbuffer#238=0X136,Ringbuffer#239=0X137 variable Ringbuffer#240=0X138,Ringbuffer#241=0X139,Ringbuffer#242=0X13A,Ringbuffer#243=0X13B variable Ringbuffer#244=0X13C,Ringbuffer#245=0X13D,Ringbuffer#246=0X13E,Ringbuffer#247=0X13F variable Ringbuffer#248=0X140,Ringbuffer#249=0X141,Ringbuffer#250=0X142,Ringbuffer#251=0X143 variable Ringbuffer#252=0X144,Ringbuffer#253=0X145,Ringbuffer#254=0X146,Ringbuffer#255=0X147 Resort equ 0X148 vels equ 0X149 velsH equ 0X14A variable vels#0=0X149,vels#0H=0X14A,vels#1=0X14B,vels#1H=0X14C variable vels#2=0X14D,vels#2H=0X14E,vels#3=0X14F,vels#3H=0X150 variable vels#4=0X151,vels#4H=0X152,vels#5=0X153,vels#5H=0X154 variable vels#6=0X155,vels#6H=0X156,vels#7=0X157,vels#7H=0X158 variable vels#8=0X159,vels#8H=0X15A,vels#9=0X15B,vels#9H=0X15C variable vels#10=0X15D,vels#10H=0X15E,vels#11=0X15F,vels#11H=0X160 variable vels#12=0X161,vels#12H=0X162,vels#13=0X163,vels#13H=0X164 variable vels#14=0X165,vels#14H=0X166,vels#15=0X167,vels#15H=0X168 variable vels#16=0X169,vels#16H=0X16A,vels#17=0X16B,vels#17H=0X16C variable vels#18=0X16D,vels#18H=0X16E,vels#19=0X16F,vels#19H=0X170 variable vels#20=0X171,vels#20H=0X172,vels#21=0X173,vels#21H=0X174 variable vels#22=0X175,vels#22H=0X176,vels#23=0X177,vels#23H=0X178 variable vels#24=0X179,vels#24H=0X17A,vels#25=0X17B,vels#25H=0X17C variable vels#26=0X17D,vels#26H=0X17E,vels#27=0X17F,vels#27H=0X180 variable vels#28=0X181,vels#28H=0X182,vels#29=0X183,vels#29H=0X184 variable vels#30=0X185,vels#30H=0X186,vels#31=0X187,vels#31H=0X188 variable vels#32=0X189,vels#32H=0X18A,vels#33=0X18B,vels#33H=0X18C variable vels#34=0X18D,vels#34H=0X18E,vels#35=0X18F,vels#35H=0X190 variable vels#36=0X191,vels#36H=0X192,vels#37=0X193,vels#37H=0X194 variable vels#38=0X195,vels#38H=0X196,vels#39=0X197,vels#39H=0X198 variable vels#40=0X199,vels#40H=0X19A,vels#41=0X19B,vels#41H=0X19C variable vels#42=0X19D,vels#42H=0X19E,vels#43=0X19F,vels#43H=0X1A0 variable vels#44=0X1A1,vels#44H=0X1A2,vels#45=0X1A3,vels#45H=0X1A4 variable vels#46=0X1A5,vels#46H=0X1A6,vels#47=0X1A7,vels#47H=0X1A8 variable vels#48=0X1A9,vels#48H=0X1AA,vels#49=0X1AB,vels#49H=0X1AC variable vels#50=0X1AD,vels#50H=0X1AE,vels#51=0X1AF,vels#51H=0X1B0 variable vels#52=0X1B1,vels#52H=0X1B2,vels#53=0X1B3,vels#53H=0X1B4 variable vels#54=0X1B5,vels#54H=0X1B6,vels#55=0X1B7,vels#55H=0X1B8 variable vels#56=0X1B9,vels#56H=0X1BA,vels#57=0X1BB,vels#57H=0X1BC variable vels#58=0X1BD,vels#58H=0X1BE,vels#59=0X1BF,vels#59H=0X1C0 variable vels#60=0X1C1,vels#60H=0X1C2,vels#61=0X1C3,vels#61H=0X1C4 variable vels#62=0X1C5,vels#62H=0X1C6,vels#63=0X1C7,vels#63H=0X1C8 variable vels#64=0X1C9,vels#64H=0X1CA,vels#65=0X1CB,vels#65H=0X1CC variable vels#66=0X1CD,vels#66H=0X1CE,vels#67=0X1CF,vels#67H=0X1D0 variable vels#68=0X1D1,vels#68H=0X1D2,vels#69=0X1D3,vels#69H=0X1D4 variable vels#70=0X1D5,vels#70H=0X1D6,vels#71=0X1D7,vels#71H=0X1D8 variable vels#72=0X1D9,vels#72H=0X1DA,vels#73=0X1DB,vels#73H=0X1DC variable vels#74=0X1DD,vels#74H=0X1DE,vels#75=0X1DF,vels#75H=0X1E0 variable vels#76=0X1E1,vels#76H=0X1E2,vels#77=0X1E3,vels#77H=0X1E4 variable vels#78=0X1E5,vels#78H=0X1E6,vels#79=0X1E7,vels#79H=0X1E8 variable vels#80=0X1E9,vels#80H=0X1EA,vels#81=0X1EB,vels#81H=0X1EC variable vels#82=0X1ED,vels#82H=0X1EE,vels#83=0X1EF,vels#83H=0X1F0 variable vels#84=0X1F1,vels#84H=0X1F2,vels#85=0X1F3,vels#85H=0X1F4 variable vels#86=0X1F5,vels#86H=0X1F6,vels#87=0X1F7,vels#87H=0X1F8 variable vels#88=0X1F9,vels#88H=0X1FA,vels#89=0X1FB,vels#89H=0X1FC variable vels#90=0X1FD,vels#90H=0X1FE,vels#91=0X1FF,vels#91H=0X200 variable vels#92=0X201,vels#92H=0X202,vels#93=0X203,vels#93H=0X204 variable vels#94=0X205,vels#94H=0X206,vels#95=0X207,vels#95H=0X208 variable vels#96=0X209,vels#96H=0X20A,vels#97=0X20B,vels#97H=0X20C variable vels#98=0X20D,vels#98H=0X20E,vels#99=0X20F,vels#99H=0X210 variable vels#100=0X211,vels#100H=0X212,vels#101=0X213,vels#101H=0X214 variable vels#102=0X215,vels#102H=0X216,vels#103=0X217,vels#103H=0X218 variable vels#104=0X219,vels#104H=0X21A,vels#105=0X21B,vels#105H=0X21C variable vels#106=0X21D,vels#106H=0X21E,vels#107=0X21F,vels#107H=0X220 variable vels#108=0X221,vels#108H=0X222,vels#109=0X223,vels#109H=0X224 variable vels#110=0X225,vels#110H=0X226,vels#111=0X227,vels#111H=0X228 variable vels#112=0X229,vels#112H=0X22A,vels#113=0X22B,vels#113H=0X22C variable vels#114=0X22D,vels#114H=0X22E,vels#115=0X22F,vels#115H=0X230 variable vels#116=0X231,vels#116H=0X232,vels#117=0X233,vels#117H=0X234 variable vels#118=0X235,vels#118H=0X236,vels#119=0X237,vels#119H=0X238 variable vels#120=0X239,vels#120H=0X23A,vels#121=0X23B,vels#121H=0X23C variable vels#122=0X23D,vels#122H=0X23E,vels#123=0X23F,vels#123H=0X240 variable vels#124=0X241,vels#124H=0X242,vels#125=0X243,vels#125H=0X244 variable vels#126=0X245,vels#126H=0X246,vels#127=0X247,vels#127H=0X248 Kleppen equ 0X249 variable Kleppen#0=0X249,Kleppen#1=0X24A,Kleppen#2=0X24B,Kleppen#3=0X24C variable Kleppen#4=0X24D,Kleppen#5=0X24E,Kleppen#6=0X24F,Kleppen#7=0X250 variable Kleppen#8=0X251,Kleppen#9=0X252,Kleppen#10=0X253,Kleppen#11=0X254 variable Kleppen#12=0X255,Kleppen#13=0X256,Kleppen#14=0X257,Kleppen#15=0X258 variable Kleppen#16=0X259,Kleppen#17=0X25A,Kleppen#18=0X25B,Kleppen#19=0X25C variable Kleppen#20=0X25D,Kleppen#21=0X25E,Kleppen#22=0X25F,Kleppen#23=0X260 variable Kleppen#24=0X261,Kleppen#25=0X262,Kleppen#26=0X263,Kleppen#27=0X264 variable Kleppen#28=0X265,Kleppen#29=0X266,Kleppen#30=0X267,Kleppen#31=0X268 variable Kleppen#32=0X269,Kleppen#33=0X26A,Kleppen#34=0X26B,Kleppen#35=0X26C variable Kleppen#36=0X26D,Kleppen#37=0X26E,Kleppen#38=0X26F,Kleppen#39=0X270 variable Kleppen#40=0X271,Kleppen#41=0X272,Kleppen#42=0X273,Kleppen#43=0X274 variable Kleppen#44=0X275,Kleppen#45=0X276,Kleppen#46=0X277,Kleppen#47=0X278 variable Kleppen#48=0X279,Kleppen#49=0X27A,Kleppen#50=0X27B,Kleppen#51=0X27C variable Kleppen#52=0X27D,Kleppen#53=0X27E,Kleppen#54=0X27F,Kleppen#55=0X280 variable Kleppen#56=0X281,Kleppen#57=0X282,Kleppen#58=0X283,Kleppen#59=0X284 variable Kleppen#60=0X285,Kleppen#61=0X286,Kleppen#62=0X287,Kleppen#63=0X288 variable Kleppen#64=0X289,Kleppen#65=0X28A,Kleppen#66=0X28B,Kleppen#67=0X28C variable Kleppen#68=0X28D,Kleppen#69=0X28E,Kleppen#70=0X28F,Kleppen#71=0X290 variable Kleppen#72=0X291,Kleppen#73=0X292,Kleppen#74=0X293,Kleppen#75=0X294 variable Kleppen#76=0X295,Kleppen#77=0X296,Kleppen#78=0X297,Kleppen#79=0X298 variable Kleppen#80=0X299,Kleppen#81=0X29A,Kleppen#82=0X29B,Kleppen#83=0X29C variable Kleppen#84=0X29D,Kleppen#85=0X29E,Kleppen#86=0X29F,Kleppen#87=0X2A0 variable Kleppen#88=0X2A1,Kleppen#89=0X2A2,Kleppen#90=0X2A3,Kleppen#91=0X2A4 variable Kleppen#92=0X2A5,Kleppen#93=0X2A6,Kleppen#94=0X2A7,Kleppen#95=0X2A8 variable Kleppen#96=0X2A9,Kleppen#97=0X2AA,Kleppen#98=0X2AB,Kleppen#99=0X2AC variable Kleppen#100=0X2AD,Kleppen#101=0X2AE,Kleppen#102=0X2AF,Kleppen#103=0X2B0 variable Kleppen#104=0X2B1,Kleppen#105=0X2B2,Kleppen#106=0X2B3,Kleppen#107=0X2B4 variable Kleppen#108=0X2B5,Kleppen#109=0X2B6,Kleppen#110=0X2B7,Kleppen#111=0X2B8 variable Kleppen#112=0X2B9,Kleppen#113=0X2BA,Kleppen#114=0X2BB,Kleppen#115=0X2BC variable Kleppen#116=0X2BD,Kleppen#117=0X2BE,Kleppen#118=0X2BF,Kleppen#119=0X2C0 variable Kleppen#120=0X2C1,Kleppen#121=0X2C2,Kleppen#122=0X2C3,Kleppen#123=0X2C4 variable Kleppen#124=0X2C5,Kleppen#125=0X2C6,Kleppen#126=0X2C7,Kleppen#127=0X2C8 GetMidiInResult equ 0X2C9 SortTimersResult equ 0X2CA ; HEAP VARIABLES ; LOW PRIORITY INTERRUPT CONTEXT STORAGE _Low__Context_Store equ 0X2CB variable _Low__Context_Store_0=0X2CB,_Low__Context_Store_1=0X2CC,_Low__Context_Store_2=0X2CD ; ALIAS VARIABLES #define CntHw CntHH #define CntHwH CntHHH #define CntLw TMR0L #define CntLwH TMR0LH #define time Cnt #define timeH CntH #define timeHH CntHH #define timeHHH CntHHH #define StBit Bytein,7 #define PowerOn CC66,0 #define maxtim timeHHH,7 #define Resort_flag Resort,0 #define FSR0SaveInt PP0 #define FSR0SaveIntH PP0H #define USART_FSR0_Save FSR0SaveInt #define USART_FSR0_SaveH PP0H #define USART_FSR0 FSR0L #define USART_FSR0H FSR0LH #define USART_FSR1 FSR1L #define USART_FSR1H FSR1LH ; CONSTANTS #define __optimiser_level 3 #define __xtal 40 #define PWMminF 2442 #define PWMminFH 9 #define Ekla_low_note 54 #define Ekla_high_note 105 #define Midichannel 6 #define NoteOff_Status 134 #define NoteOn_Status 150 #define Keypres_Status 166 #define Control_Status 182 #define ProgChange_Status 198 #define Aftertouch_Status 214 #define Pitchbend_Status 230 #define NrTasks 3 #define LastTask 2 #define MinVel 20 #define Hold_Time 65535 #define Hold_TimeH 255 #define Eye_Time 8192 #define Eye_TimeH 32 #define HSERIAL_TXSTA 36 ;--------------------------------------------- ; START OF THE COMPILER'S LIBRARY ROUTINES _compiler__start_ org 0X000000 nop nop goto _compiler_main_start_ org 0X000008 bra High_Prior_Interrupt org 0X000018 bra Low_Prior_Interrupt __hrsout1__ btfss PIR1,PP_TXIF bra $ - 2 movwf TXREG return __delay_ms_ clrf PP1H __delay_ms_wreg_ movwf PP1 __delayms_from_regs__ movlw 255 addwf PP1,F addwfc PP1H,F bra $ + 2 btfss STATUS,0 return movlw 3 movwf PP0H movlw 230 rcall __delay_us_wreg_ bra __delayms_from_regs__ __delay_us_ clrf PP0H __delay_us_wreg_ addlw 254 movwf PP0 clrf WREG subwfb PP0H,F btfss STATUS,0 return nop decf PP0,F bra $ + 2 bra $ - 14 __fpadd_32__ movf PP_BARG,W subwf PP_AARG,W movwf _BEXP bc __fpadd_32_1 negf _BEXP,0 movf PP_AARG,W movff PP_BARG,PP_AARG movwf PP_BARG movf PP_AARGH,W movff PP_BARGH,PP_AARGH movwf PP_BARGH movf PP_AARGHH,W movff PP_BARGHH,PP_AARGHH movwf PP_BARGHH movf PP_AARGHHH,W movff PP_BARGHHH,PP_AARGHHH movwf PP_BARGHHH __fpadd_32_1 movlw 26 cpfslt _BEXP,0 bra __fpadd_32_ret movf PP_BARG,F bz __fpadd_32_ret clrf _AEXP movf PP_AARGH,W movwf _FP_TEMP xorwf PP_BARGH,W movwf _FP_SIGN bsf PP_AARGH,7 bsf PP_BARGH,7 __fpadd_32_2 movlw 8 subwf _BEXP,F bnc __fpadd_32_3 movff PP_BARGHHH,_AEXP movff PP_BARGHH,PP_BARGHHH movff PP_BARGH,PP_BARGHH clrf PP_BARGH bra __fpadd_32_2 __fpadd_32_3 addwf _BEXP,F bz __fpadd_32_5 __fpadd_32_4 bcf STATUS,0 rrcf PP_BARGH,F rrcf PP_BARGHH,F rrcf PP_BARGHHH,F rrcf _AEXP,F decfsz _BEXP,F bra __fpadd_32_4 __fpadd_32_5 btfss _FP_SIGN,7 bra __fpadd_32_11 movf PP_BARGHHH,W subwf PP_AARGHHH,F movf PP_BARGHH,W subwfb PP_AARGHH,F movf PP_BARGH,W subwfb PP_AARGH,F bc __fpadd_32_6 bsf STATUS,0 movlw 0 subfwb PP_AARGHHH,F subfwb PP_AARGHH,F subfwb PP_AARGH,F movlw 128 xorwf _FP_TEMP,F __fpadd_32_6 negf _AEXP,0 bz __fpadd_32_7 decf PP_AARGHHH,F movlw 0 subwfb PP_AARGHH,F subwfb PP_AARGH,F __fpadd_32_7 movlw 4 movwf _BEXP __fpadd_32_8 tstfsz PP_AARGH,0 bra __fpadd_32_9 movff PP_AARGHH,PP_AARGH movff PP_AARGHHH,PP_AARGHH movff _AEXP,PP_AARGHHH clrf _AEXP movlw 8 subwf PP_AARG,F bnc __fpadd_32_Res0 decfsz _BEXP,F bra __fpadd_32_8 bra __fpadd_32_Res0 __fpadd_32_9 btfsc PP_AARGH,7 bra __fpadd_32_10 bcf STATUS,0 rlcf _AEXP,F rlcf PP_AARGHHH,F rlcf PP_AARGHH,F rlcf PP_AARGH,F decfsz PP_AARG,F bra __fpadd_32_9 bra __fpadd_32_Res0 __fpadd_32_10 btfss _AEXP,7 bra __fpadd_32_Set_Sign clrf _AEXP bra __fpadd_32_increment __fpadd_32_11 movf PP_BARGHHH,W addwf PP_AARGHHH,F movf PP_BARGHH,W addwfc PP_AARGHH,F movf PP_BARGH,W addwfc PP_AARGH,F bnc __fpadd_32_13 __fpadd_32_adjust_right rrcf PP_AARGH,F rrcf PP_AARGHH,F rrcf PP_AARGHHH,F rrcf _AEXP,F infsnz PP_AARG,F bra __fpadd_32_Overflow __fpadd_32_13 btfss _AEXP,7 bra __fpadd_32_Set_Sign __fpadd_32_increment incfsz PP_AARGHHH,F bra __fpadd_32_Set_Sign incfsz PP_AARGHH,F bra __fpadd_32_Set_Sign incfsz PP_AARGH,F bra __fpadd_32_Set_Sign bsf STATUS,0 bcf PP_AARGHHH,0 bra __fpadd_32_adjust_right __fpadd_32_Res0 clrf PP_AARG bra __fpadd_32_Mantissa __fpadd_32_Overflow bsf _FP_FLAGS,1 setf PP_AARG __fpadd_32_Mantissa clrf PP_AARGHHH clrf PP_AARGHH movlw 128 movwf PP_AARGH __fpadd_32_Set_Sign btfss _FP_TEMP,7 bcf PP_AARGH,7 __fpadd_32_ret movf PP_AARGHHH,W return _Fl32_To_Int32 movff PP_AARG,_FP_TEMP movf PP_AARGH,W movff PP_AARGHHH,PP_AARGH movwf PP_AARGHHH rlcf PP_AARGHHH,F rrcf _FP_TEMP,F rrcf PP_AARGHHH,F clrf _FP_FLAGS rlcf PP_AARGHHH,F rlcf _FP_TEMP,F bnc _Fl32Int__UnpkA1 bsf _FP_FLAGS,2 btg _FP_FLAGS,7,0 _Fl32Int__UnpkA1 bnz _Fl32Int__UnpkANZ bsf _FP_FLAGS,0 clrf _FP_TEMP clrf PP_AARGHHH clrf PP_AARGHH clrf PP_AARGH bra _Fl32IntUnp__Exit _Fl32Int__UnpkANZ incf _FP_TEMP,W bz _Fl32Int__UnpkA2 bsf STATUS,0 rrcf PP_AARGHHH,F bra _Fl32IntUnp__Exit _Fl32Int__UnpkA2 bcf STATUS,0 rrcf PP_AARGHHH,F bnz _Fl32Int__UnpkNaN bsf _FP_FLAGS,1 bra _Fl32IntUnp__Exit _Fl32Int__UnpkNaN bsf _FP_FLAGS,3 _Fl32IntUnp__Exit btfsc _FP_FLAGS,3 bra _Fl32Int__MaxPos btfss _FP_FLAGS,1 bra _Fl32Int__NotInf _Fl32Int__Max btfsc _FP_FLAGS,2 bra _Fl32Int__MaxNeg _Fl32Int__MaxPos movlw 127 movwf PP_AARGHHH movlw 255 _Fl32Int__Wr123 movwf PP_AARGHH movwf PP_AARGH movwf PP_AARG bra _Fl32Int__Exit _Fl32Int__MaxNeg movlw 128 movwf PP_AARGHHH bra _Fl32Int__WrZ123 _Fl32Int__Zero clrf PP_AARGHHH _Fl32Int__WrZ123 movlw 0 bra _Fl32Int__Wr123 _Fl32Int__NotInf btfsc _FP_FLAGS,0 bra _Fl32Int__Zero clrf PP_AARG movlw 159 cpfslt _FP_TEMP,0 bra _Fl32Int__Max movlw 126 cpfsgt _FP_TEMP,0 bra _Fl32Int__Zero _Fl32Int__Loop movlw 158 subwf _FP_TEMP,W bz _Fl32Int__LoopExit bcf STATUS,0 rrcf PP_AARGHHH,F rrcf PP_AARGHH,F rrcf PP_AARGH,F rrcf PP_AARG,F incf _FP_TEMP,F bra _Fl32Int__Loop _Fl32Int__LoopExit btfss _FP_FLAGS,2 bra _Fl32Int__Exit bsf STATUS,0 movlw 0 subfwb PP_AARG,F subfwb PP_AARGH,F subfwb PP_AARGHH,F subfwb PP_AARGHHH,F btfss PP_AARGHHH,7 bra _Fl32Int__Zero _Fl32Int__Exit movf PP_AARG,W return _Uns_Int16_ToFl32 clrf PP_AARGHH clrf PP_AARGHHH _UnSgn_Int32_ToFl32 bcf _FP_SIGN,7 bra __Int32_ToFl32_L5 _Sgn_Int32_ToFl32 bcf _FP_SIGN,7 btfss PP_AARGHHH,7 bra __Int32_ToFl32_L5 bsf STATUS,0 movlw 0 subfwb PP_AARG,F subfwb PP_AARGH,F subfwb PP_AARGHH,F subfwb PP_AARGHHH,F bsf _FP_SIGN,7 __Int32_ToFl32_L5 movlw 150 movwf _FP_TEMP movf PP_AARGHHH,F bz __Int32_ToFl32_L7 __Int32_ToFl32_L17 movlw 8 addwf _FP_TEMP,F movff PP_AARGH,PP_AARG movff PP_AARGHH,PP_AARGH movff PP_AARGHHH,PP_AARGHH bra __Int32_ToFl32_L18 __Int32_ToFl32_L7 movf PP_AARGHH,F bnz __Int32_ToFl32_L18 movlw 8 subwf _FP_TEMP,F movf PP_AARGH,W bnz __Int32_ToFl32_L20 movlw 8 subwf _FP_TEMP,F movf PP_AARG,W bnz __Int32_ToFl32_L22 movf PP_AARGHHH,W bra __Int32_ToFl32_Exit __Int32_ToFl32_L22 clrf PP_AARG __Int32_ToFl32_L20 movwf PP_AARGHH movff PP_AARG,PP_AARGH clrf PP_AARG __Int32_ToFl32_L18 btfsc PP_AARGHH,7 bra __Int32_ToFl32_L24 bcf STATUS,0 rlcf PP_AARG,F rlcf PP_AARGH,F rlcf PP_AARGHH,F decf _FP_TEMP,F bra __Int32_ToFl32_L18 __Int32_ToFl32_L24 btfss _FP_SIGN,7 bcf PP_AARGHH,7 __Int32_ToFl32_L26 movf _FP_TEMP,W __Int32_ToFl32_Exit movff PP_AARG,PP_AARGHHH movwf PP_AARG movf PP_AARGHH,W movff PP_AARGH,PP_AARGHH movwf PP_AARGH return _compiler_main_start_ movlw 64 movwf _FP_FLAGS clrf BPF ; UART1_ACTUALBAUD = 31250 ; UART1_BAUDERROR = 0 bcf BAUDCON,PP_BRG16 movlw 79 movwf SPBRG clrf SPBRGH movlw 36 movwf TXSTA movlw 144 movwf RCSTA movlb 0 ;--------------------------------------------- ; START OF THE USER'S PROGRAM CODE F1_SOF equ $ ; EKLA_PH2.BAS F2_SOF equ $ ; 18F4620.Inc movlw 15 movwf ADCON1,0 movlw 7 movwf CMCON,0 F2_EOF equ $ ; 18F4620.Inc F1_000109 equ $ ; in [EKLA_PH2.BAS] DECLARE ALL_DIGITAL = TRUE F1_000110 equ $ ; in [EKLA_PH2.BAS] Clear SSPCON1.5 bcf SSPCON1,5,0 F1_000112 equ $ ; in [EKLA_PH2.BAS] TRISA = %11000000 movlw 192 movwf TRISA,0 F1_000113 equ $ ; in [EKLA_PH2.BAS] TRISB = %11100000 movlw 224 movwf TRISB,0 F1_000114 equ $ ; in [EKLA_PH2.BAS] TRISC = %11000000 movlw 192 movwf TRISC,0 F1_000115 equ $ ; in [EKLA_PH2.BAS] TRISD = %00000000 clrf TRISD,0 F1_000116 equ $ ; in [EKLA_PH2.BAS] TRISE = %11101000 movlw 232 movwf TRISE,0 F3_SOF equ $ ; EKLAPH2_IRQ.Inc F3_000069 equ $ ; in [EKLAPH2_IRQ.Inc] goto _Over_IRQ_Handler bra _Over_IRQ_Handler ;--------------------------------------------- ; HIGH PRIORITY INTERRUPT HANDLER High_Prior_Interrupt _Timer0_IRQ F3_000081 equ $ ; in [EKLAPH2_IRQ.Inc] if INTCON.2 = 1 Then btfss INTCON,2,0 bra _lbl__3 F3_000082 equ $ ; in [EKLAPH2_IRQ.Inc] Clear INTCON.2 bcf INTCON,2,0 F3_000083 equ $ ; in [EKLAPH2_IRQ.Inc] Inc Cnt.Word1 infsnz CntHH,F,0 incf CntHHH,F,0 F3_000084 equ $ ; in [EKLAPH2_IRQ.Inc] Cnt.Word0 = CntLw movff TMR0L,Cnt movff TMR0LH,CntH F3_000085 equ $ ; in [EKLAPH2_IRQ.Inc] btg PORTB.5 btg PORTB,5 F3_000086 equ $ ; in [EKLAPH2_IRQ.Inc] retfie fast retfie 1 F3_000087 equ $ ; in [EKLAPH2_IRQ.Inc] endif _lbl__3 _UART_IRQ F3_000089 equ $ ; in [EKLAPH2_IRQ.Inc] if PIR1.5 = 1 Then btfss PIR1,5,0 bra _lbl__5 F3_000090 equ $ ; in [EKLAPH2_IRQ.Inc] movlw 6 movlw 6 F3_000091 equ $ ; in [EKLAPH2_IRQ.Inc] andwf RCSTA,W andwf RCSTA,W F3_000092 equ $ ; in [EKLAPH2_IRQ.Inc] bnz _Uart_Error bnz _Uart_Error F3_000093 equ $ ; in [EKLAPH2_IRQ.Inc] USART_FSR1_Save = USART_FSR1 movff FSR1LH,USART_FSR1_SaveH movff FSR1L,USART_FSR1_Save F3_000094 equ $ ; in [EKLAPH2_IRQ.Inc] Inc IndexIn incf IndexIn,F,0 F3_000104 equ $ ; in [EKLAPH2_IRQ.Inc] USART_FSR1 = VarPtr Ringbuffer lfsr 1,72 F3_000105 equ $ ; in [EKLAPH2_IRQ.Inc] USART_FSR1 = USART_FSR1 + IndexIn movf IndexIn,W,0 addwf FSR1L,F,0 movlw 0 addwfc FSR1LH,F,0 F3_000106 equ $ ; in [EKLAPH2_IRQ.Inc] INDF1 = RCREG movff RCREG,INDF1 F3_000107 equ $ ; in [EKLAPH2_IRQ.Inc] USART_FSR1 = USART_FSR1_Save movff USART_FSR1_SaveH,FSR1LH movff USART_FSR1_Save,FSR1L F3_000109 equ $ ; in [EKLAPH2_IRQ.Inc] retfie fast retfie 1 _Uart_Error F3_000111 equ $ ; in [EKLAPH2_IRQ.Inc] WREG = RCREG movf RCREG,W,0 F3_000112 equ $ ; in [EKLAPH2_IRQ.Inc] WREG = RCREG movf RCREG,W,0 F3_000113 equ $ ; in [EKLAPH2_IRQ.Inc] Clear RCSTA.4 bcf RCSTA,4,0 F3_000114 equ $ ; in [EKLAPH2_IRQ.Inc] Set RCSTA.4 bsf RCSTA,4,0 F3_000115 equ $ ; in [EKLAPH2_IRQ.Inc] endif _lbl__5 F3_000116 equ $ ; in [EKLAPH2_IRQ.Inc] retfie fast retfie 1 _Init_Usart F3_000151 equ $ ; in [EKLAPH2_IRQ.Inc] Clear IndexIn clrf IndexIn,0 F3_000152 equ $ ; in [EKLAPH2_IRQ.Inc] Clear IndexOut clrf IndexOut,0 F3_000153 equ $ ; in [EKLAPH2_IRQ.Inc] Set PIE1.5 bsf PIE1,5,0 F3_000155 equ $ ; in [EKLAPH2_IRQ.Inc] Set IPR1.5 bsf IPR1,5,0 F3_000157 equ $ ; in [EKLAPH2_IRQ.Inc] Set INTCON.7 bsf INTCON,7,0 F3_000158 equ $ ; in [EKLAPH2_IRQ.Inc] Set INTCON.6 bsf INTCON,6,0 F3_000160 equ $ ; in [EKLAPH2_IRQ.Inc] return return 0 _Clear_Usart_Buffer F3_000175 equ $ ; in [EKLAPH2_IRQ.Inc] PIE1.5 = 0 bcf PIE1,5,0 F3_000176 equ $ ; in [EKLAPH2_IRQ.Inc] Clear Ringbuffer lfsr 0,Ringbuffer movlw 1 movwf PRODLH,0 clrf PRODL,0 _pblb__6 decf PRODL,F,0 movlw 0 subwfb PRODLH,F,0 clrf POSTINC0,0 movf PRODH,W,0 iorwf PRODL,W,0 bnz _pblb__6 F3_000177 equ $ ; in [EKLAPH2_IRQ.Inc] Clear IndexIn clrf IndexIn,0 F3_000178 equ $ ; in [EKLAPH2_IRQ.Inc] Clear IndexOut clrf IndexOut,0 F3_000179 equ $ ; in [EKLAPH2_IRQ.Inc] Set PIE1.5 bsf PIE1,5,0 F3_000180 equ $ ; in [EKLAPH2_IRQ.Inc] return return 0 ;--------------------------------------------- ; LOW PRIORITY INTERRUPT HANDLER Low_Prior_Interrupt Timer3_ISR F3_000188 equ $ ; in [EKLAPH2_IRQ.Inc] Context Save bcf INTCON,7,0 movff BSR,_Low__Context_Store_0 movff STATUS,_Low__Context_Store_1 movff WREG,_Low__Context_Store_2 bsf INTCON,7,0 movlb 0 F3_000189 equ $ ; in [EKLAPH2_IRQ.Inc] Clear PIR2.1 bcf PIR2,1,0 F3_000195 equ $ ; in [EKLAPH2_IRQ.Inc] Context Restore bcf INTCON,7,0 movff _Low__Context_Store_0,BSR movff _Low__Context_Store_1,STATUS movff _Low__Context_Store_2,WREG bsf INTCON,7,0 retfie _Over_IRQ_Handler F3_EOF equ $ ; EKLAPH2_IRQ.Inc MAIN F1_000208 equ $ ; in [EKLA_PH2.BAS] low PORTB.5 bcf TRISB,5,0 bcf LATB,5,0 F1_000209 equ $ ; in [EKLA_PH2.BAS] DelayMs 10 movlw 10 rcall __delay_ms_ F1_000210 equ $ ; in [EKLA_PH2.BAS] low PORTD.1 bcf TRISD,1,0 bcf LATD,1,0 F1_000211 equ $ ; in [EKLA_PH2.BAS] low PORTC.3 bcf TRISC,3,0 bcf LATC,3,0 F1_000212 equ $ ; in [EKLA_PH2.BAS] low PORTC.1 bcf TRISC,1,0 bcf LATC,1,0 F1_000213 equ $ ; in [EKLA_PH2.BAS] low PORTD.2 bcf TRISD,2,0 bcf LATD,2,0 F1_000214 equ $ ; in [EKLA_PH2.BAS] low PORTC.4 bcf TRISC,4,0 bcf LATC,4,0 F1_000215 equ $ ; in [EKLA_PH2.BAS] low PORTD.4 bcf TRISD,4,0 bcf LATD,4,0 F1_000216 equ $ ; in [EKLA_PH2.BAS] low PORTD.6 bcf TRISD,6,0 bcf LATD,6,0 F1_000217 equ $ ; in [EKLA_PH2.BAS] low PORTB.0 bcf TRISB,0,0 bcf LATB,0,0 F1_000218 equ $ ; in [EKLA_PH2.BAS] low PORTB.2 bcf TRISB,2,0 bcf LATB,2,0 F1_000219 equ $ ; in [EKLA_PH2.BAS] low PORTB.4 bcf TRISB,4,0 bcf LATB,4,0 F1_000220 equ $ ; in [EKLA_PH2.BAS] low PORTE.1 bcf TRISE,1,0 bcf LATE,1,0 F1_000221 equ $ ; in [EKLA_PH2.BAS] low PORTA.5 bcf TRISA,5,0 bcf LATA,5,0 F1_000222 equ $ ; in [EKLA_PH2.BAS] low PORTA.3 bcf TRISA,3,0 bcf LATA,3,0 F1_000223 equ $ ; in [EKLA_PH2.BAS] low PORTA.1 bcf TRISA,1,0 bcf LATA,1,0 F1_000224 equ $ ; in [EKLA_PH2.BAS] low PORTD.0 bcf TRISD,0,0 bcf LATD,0,0 F1_000225 equ $ ; in [EKLA_PH2.BAS] low PORTC.2 bcf TRISC,2,0 bcf LATC,2,0 F1_000226 equ $ ; in [EKLA_PH2.BAS] low PORTC.0 bcf TRISC,0,0 bcf LATC,0,0 F1_000227 equ $ ; in [EKLA_PH2.BAS] low PORTD.3 bcf TRISD,3,0 bcf LATD,3,0 F1_000228 equ $ ; in [EKLA_PH2.BAS] low PORTC.5 bcf TRISC,5,0 bcf LATC,5,0 F1_000229 equ $ ; in [EKLA_PH2.BAS] low PORTD.5 bcf TRISD,5,0 bcf LATD,5,0 F1_000230 equ $ ; in [EKLA_PH2.BAS] low PORTD.7 bcf TRISD,7,0 bcf LATD,7,0 F1_000231 equ $ ; in [EKLA_PH2.BAS] low PORTB.1 bcf TRISB,1,0 bcf LATB,1,0 F1_000232 equ $ ; in [EKLA_PH2.BAS] low PORTB.3 bcf TRISB,3,0 bcf LATB,3,0 F1_000233 equ $ ; in [EKLA_PH2.BAS] low PORTE.2 bcf TRISE,2,0 bcf LATE,2,0 F1_000234 equ $ ; in [EKLA_PH2.BAS] low PORTE.0 bcf TRISE,0,0 bcf LATE,0,0 F1_000235 equ $ ; in [EKLA_PH2.BAS] low PORTA.4 bcf TRISA,4,0 bcf LATA,4,0 F1_000236 equ $ ; in [EKLA_PH2.BAS] low PORTA.0 bcf TRISA,0,0 bcf LATA,0,0 F1_000237 equ $ ; in [EKLA_PH2.BAS] low PORTA.2 bcf TRISA,2,0 bcf LATA,2,0 F1_000238 equ $ ; in [EKLA_PH2.BAS] Set TimVals lfsr 0,TimVals movlw 12 _pblb__7 setf POSTINC0,0 decfsz WREG,F,0 bra _pblb__7 F1_000240 equ $ ; in [EKLA_PH2.BAS] Init_Usart_Interrupt variable max_params=10,INIT_USART_INTERRUPT_RETURN=0,prm_count=0 rcall _Init_Usart F1_000242 equ $ ; in [EKLA_PH2.BAS] Clear_Serial_Buffer variable max_params=10,CLEAR_SERIAL_BUFFER_RETURN=0,prm_count=0 rcall _Clear_Usart_Buffer F1_000253 equ $ ; in [EKLA_PH2.BAS] Clear T1CON clrf T1CON,0 F1_000254 equ $ ; in [EKLA_PH2.BAS] Clear INTCON.2 bcf INTCON,2,0 F1_000255 equ $ ; in [EKLA_PH2.BAS] Set INTCON.5 bsf INTCON,5,0 F1_000256 equ $ ; in [EKLA_PH2.BAS] T0CON = %10000111 movlw 135 movwf T0CON,0 F1_000291 equ $ ; in [EKLA_PH2.BAS] Clear T3CON clrf T3CON,0 F1_000292 equ $ ; in [EKLA_PH2.BAS] Clear PIR2.1 bcf PIR2,1,0 F1_000293 equ $ ; in [EKLA_PH2.BAS] Set PIE2.1 bsf PIE2,1,0 F1_000296 equ $ ; in [EKLA_PH2.BAS] Set RCON.7 bsf RCON,7,0 F1_000297 equ $ ; in [EKLA_PH2.BAS] Clear IPR2.1 bcf IPR2,1,0 F1_000299 equ $ ; in [EKLA_PH2.BAS] T3CON = %10110001 movlw 177 movwf T3CON,0 F1_000312 equ $ ; in [EKLA_PH2.BAS] Velo_Lookup () rcall Velo_Lookup F1_000313 equ $ ; in [EKLA_PH2.BAS] Kleppen_lookup () call Kleppen_lookup F1_000315 equ $ ; in [EKLA_PH2.BAS] HRsout Control_Status, 120, 64 movlw 182 rcall __hrsout1__ movlw 120 rcall __hrsout1__ movlw 64 rcall __hrsout1__ F1_000319 equ $ ; in [EKLA_PH2.BAS] Do _lbl__8 F1_000320 equ $ ; in [EKLA_PH2.BAS] Cnt.Word0 = CntLw movff TMR0L,Cnt movff TMR0LH,CntH F1_000321 equ $ ; in [EKLA_PH2.BAS] Bytein = GetMidiIn () rcall GetMidiIn movff GetMidiInResult,Bytein Midi_Parse F1_000324 equ $ ; in [EKLA_PH2.BAS] if Bytein > Control_Status Then movlw 183 subwf Bytein,W,0 bnc _lbl__12 F1_000325 equ $ ; in [EKLA_PH2.BAS] if Bytein > 253 Then movlw 254 subwf Bytein,W,0 bnc _lbl__14 bra _lbl__15 _lbl__14 F1_000329 equ $ ; in [EKLA_PH2.BAS] else F1_000330 equ $ ; in [EKLA_PH2.BAS] Clear statusbyte clrf statusbyte,0 F1_000331 equ $ ; in [EKLA_PH2.BAS] endif _lbl__15 F1_000332 equ $ ; in [EKLA_PH2.BAS] goto Check_Timers bra Check_Timers F1_000333 equ $ ; in [EKLA_PH2.BAS] endif _lbl__12 F1_000334 equ $ ; in [EKLA_PH2.BAS] if StBit =1 Then btfss Bytein,7,0 bra _lbl__17 F1_000336 equ $ ; in [EKLA_PH2.BAS] Clear statusbyte clrf statusbyte,0 F1_000337 equ $ ; in [EKLA_PH2.BAS] Select Bytein F1_000338 equ $ ; in [EKLA_PH2.BAS] Case NoteOff_Status movlw 134 subwf Bytein,W,0 bnz _lbl__19 F1_000339 equ $ ; in [EKLA_PH2.BAS] statusbyte = Bytein movff Bytein,statusbyte F1_000340 equ $ ; in [EKLA_PH2.BAS] Set noteUit setf noteUit,0 F1_000341 equ $ ; in [EKLA_PH2.BAS] Set release setf release,0 bra _lbl__18 _lbl__19 F1_000342 equ $ ; in [EKLA_PH2.BAS] Case NoteOn_Status movlw 150 subwf Bytein,W,0 bnz _lbl__22 F1_000343 equ $ ; in [EKLA_PH2.BAS] statusbyte = Bytein movff Bytein,statusbyte F1_000344 equ $ ; in [EKLA_PH2.BAS] Set noteAan setf noteAan,0 F1_000345 equ $ ; in [EKLA_PH2.BAS] Set velo setf velo,0 bra _lbl__18 _lbl__22 F1_000346 equ $ ; in [EKLA_PH2.BAS] Case Keypres_Status movlw 166 subwf Bytein,W,0 bnz _lbl__24 F1_000347 equ $ ; in [EKLA_PH2.BAS] statusbyte = Bytein movff Bytein,statusbyte F1_000348 equ $ ; in [EKLA_PH2.BAS] Set notePres setf notePres,0 F1_000349 equ $ ; in [EKLA_PH2.BAS] Set pres setf pres,0 bra _lbl__18 _lbl__24 F1_000350 equ $ ; in [EKLA_PH2.BAS] Case Control_Status movlw 182 subwf Bytein,W,0 bnz _lbl__26 F1_000351 equ $ ; in [EKLA_PH2.BAS] statusbyte = Bytein movff Bytein,statusbyte F1_000352 equ $ ; in [EKLA_PH2.BAS] Set Ctrl setf Ctrl,0 F1_000353 equ $ ; in [EKLA_PH2.BAS] Set value setf value,0 F1_000364 equ $ ; in [EKLA_PH2.BAS] EndSelect _lbl__26 _lbl__18 bra _lbl__27 _lbl__17 F1_000365 equ $ ; in [EKLA_PH2.BAS] else F1_000366 equ $ ; in [EKLA_PH2.BAS] Select statusbyte F1_000367 equ $ ; in [EKLA_PH2.BAS] Case 0 movf statusbyte,F,0 bnz _lbl__29 F1_000368 equ $ ; in [EKLA_PH2.BAS] goto Check_Timers bra Check_Timers bra _lbl__28 _lbl__29 F1_000369 equ $ ; in [EKLA_PH2.BAS] Case NoteOff_Status movlw 134 subwf statusbyte,W,0 btfss STATUS,2,0 bra _lbl__32 F1_000370 equ $ ; in [EKLA_PH2.BAS] if noteUit = 255 Then incf noteUit,W,0 bnz _lbl__34 F1_000371 equ $ ; in [EKLA_PH2.BAS] noteUit = Bytein movff Bytein,noteUit bra _lbl__35 _lbl__34 F1_000372 equ $ ; in [EKLA_PH2.BAS] else F1_000373 equ $ ; in [EKLA_PH2.BAS] release = Bytein movff Bytein,release F1_000374 equ $ ; in [EKLA_PH2.BAS] Select noteUit F1_000375 equ $ ; in [EKLA_PH2.BAS] Case playing_note movf noteUit,W,0 subwf playing_note,W,0 bnz _lbl__37 F1_000376 equ $ ; in [EKLA_PH2.BAS] Clear playing_note clrf playing_note,0 F1_000379 equ $ ; in [EKLA_PH2.BAS] TimVals[0] = Cnt + Hold_Time movlw 255 addwf Cnt,W,0 movwf PBS_VAR0,0 movlw 255 addwfc CntH,W,0 movwf PBS_VAR0H,0 movlw 0 addwfc CntHH,W,0 movwf PBS_VAR0HH,0 movlw 0 addwfc CntHHH,W,0 movwf PBS_VAR0HHH,0 movff PBS_VAR0,TimVals#0 movff PBS_VAR0H,TimVals#0H movff PBS_VAR0HH,TimVals#0HH movff PBS_VAR0HHH,TimVals#0HHH F1_000380 equ $ ; in [EKLA_PH2.BAS] old_note = noteUit movff noteUit,old_note F1_000382 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.1 bcf LATA,1,0 F1_000383 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.3 bcf LATA,3,0 F1_000384 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.5 bcf LATA,5,0 F1_000385 equ $ ; in [EKLA_PH2.BAS] Clear PORTB.4 bcf LATB,4,0 F1_000386 equ $ ; in [EKLA_PH2.BAS] Clear PORTB.0 bcf LATB,0,0 F1_000387 equ $ ; in [EKLA_PH2.BAS] Clear PORTE.1 bcf LATE,1,0 F1_000388 equ $ ; in [EKLA_PH2.BAS] Set TimVals[1] setf TimVals#1HHH,0 setf TimVals#1HH,0 setf TimVals#1H,0 setf TimVals#1,0 F1_000390 equ $ ; in [EKLA_PH2.BAS] TimVals[2] = Cnt + Eye_Time movlw 0 addwf Cnt,W,0 movwf PBS_VAR0,0 movlw 32 addwfc CntH,W,0 movwf PBS_VAR0H,0 movlw 0 addwfc CntHH,W,0 movwf PBS_VAR0HH,0 movlw 0 addwfc CntHHH,W,0 movwf PBS_VAR0HHH,0 movff PBS_VAR0,TimVals#2 movff PBS_VAR0H,TimVals#2H movff PBS_VAR0HH,TimVals#2HH movff PBS_VAR0HHH,TimVals#2HHH F1_000392 equ $ ; in [EKLA_PH2.BAS] EndSelect _lbl__37 _lbl__36 F1_000393 equ $ ; in [EKLA_PH2.BAS] Set noteUit setf noteUit,0 F1_000394 equ $ ; in [EKLA_PH2.BAS] Set Resort_flag movlb 1 bsf Resort,0,1 F1_000395 equ $ ; in [EKLA_PH2.BAS] endif _lbl__35 movlb 0 bra _lbl__28 _lbl__32 F1_000396 equ $ ; in [EKLA_PH2.BAS] Case NoteOn_Status movlw 150 subwf statusbyte,W,0 btfss STATUS,2,0 bra _lbl__40 F1_000397 equ $ ; in [EKLA_PH2.BAS] if noteAan = 255 Then incf noteAan,W,0 bnz _lbl__42 F1_000398 equ $ ; in [EKLA_PH2.BAS] noteAan = Bytein movff Bytein,noteAan bra _lbl__43 _lbl__42 F1_000399 equ $ ; in [EKLA_PH2.BAS] else F1_000400 equ $ ; in [EKLA_PH2.BAS] velo = Bytein movff Bytein,velo F1_000401 equ $ ; in [EKLA_PH2.BAS] Select noteAan F1_000402 equ $ ; in [EKLA_PH2.BAS] Case Ekla_low_note To Ekla_high_note movlw 54 subwf noteAan,W,0 btfss STATUS,0,0 bra _lbl__45 movlw 106 subwf noteAan,W,0 btfsc STATUS,0,0 bra _lbl__45 F1_000404 equ $ ; in [EKLA_PH2.BAS] Set TimVals[0] setf TimVals#0HHH,0 setf TimVals#0HH,0 setf TimVals#0H,0 setf TimVals#0,0 F1_000405 equ $ ; in [EKLA_PH2.BAS] klep = Kleppen[noteAan] lfsr 0,Kleppen movf noteAan,W,0 movf PLUSW0,W,0 movwf klep,0 F1_000406 equ $ ; in [EKLA_PH2.BAS] I = Kleppen[old_note] lfsr 0,Kleppen movf old_note,W,0 movf PLUSW0,W,0 movwf _I,0 F1_000409 equ $ ; in [EKLA_PH2.BAS] if klep.0 = 0 Then btfsc klep,0,0 bra _lbl__48 F1_000410 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.2 bcf LATA,2,0 bra _lbl__49 _lbl__48 F1_000411 equ $ ; in [EKLA_PH2.BAS] else F1_000412 equ $ ; in [EKLA_PH2.BAS] Set PORTA.2 bsf LATA,2,0 F1_000413 equ $ ; in [EKLA_PH2.BAS] if I.0 = 0 Then Set PORTA.1 btfss _I,0,0 bsf LATA,1,0 _lbl__51 F1_000414 equ $ ; in [EKLA_PH2.BAS] endif _lbl__49 F1_000415 equ $ ; in [EKLA_PH2.BAS] if klep.1 = 0 Then btfsc klep,1,0 bra _lbl__53 F1_000416 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.0 bcf LATA,0,0 bra _lbl__54 _lbl__53 F1_000417 equ $ ; in [EKLA_PH2.BAS] else F1_000418 equ $ ; in [EKLA_PH2.BAS] Set PORTA.0 bsf LATA,0,0 F1_000419 equ $ ; in [EKLA_PH2.BAS] if I.1 = 0 Then Set PORTA.3 btfss _I,1,0 bsf LATA,3,0 _lbl__56 F1_000420 equ $ ; in [EKLA_PH2.BAS] endif _lbl__54 F1_000421 equ $ ; in [EKLA_PH2.BAS] if klep.2 = 0 Then btfsc klep,2,0 bra _lbl__58 F1_000422 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.4 bcf LATA,4,0 bra _lbl__59 _lbl__58 F1_000423 equ $ ; in [EKLA_PH2.BAS] else F1_000424 equ $ ; in [EKLA_PH2.BAS] Set PORTA.4 bsf LATA,4,0 F1_000425 equ $ ; in [EKLA_PH2.BAS] if I.2 = 0 Then Set PORTA.5 btfss _I,2,0 bsf LATA,5,0 _lbl__61 F1_000426 equ $ ; in [EKLA_PH2.BAS] endif _lbl__59 F1_000427 equ $ ; in [EKLA_PH2.BAS] if klep.3 = 0 Then btfsc klep,3,0 bra _lbl__63 F1_000428 equ $ ; in [EKLA_PH2.BAS] Clear PORTE.0 bcf LATE,0,0 bra _lbl__64 _lbl__63 F1_000429 equ $ ; in [EKLA_PH2.BAS] else F1_000430 equ $ ; in [EKLA_PH2.BAS] Set PORTE.0 bsf LATE,0,0 F1_000431 equ $ ; in [EKLA_PH2.BAS] if I.3 = 0 Then Set PORTE.1 btfss _I,3,0 bsf LATE,1,0 _lbl__66 F1_000432 equ $ ; in [EKLA_PH2.BAS] endif _lbl__64 F1_000433 equ $ ; in [EKLA_PH2.BAS] if klep.4 = 0 Then btfsc klep,4,0 bra _lbl__68 F1_000434 equ $ ; in [EKLA_PH2.BAS] Clear PORTE.2 bcf LATE,2,0 bra _lbl__69 _lbl__68 F1_000435 equ $ ; in [EKLA_PH2.BAS] else F1_000436 equ $ ; in [EKLA_PH2.BAS] Set PORTE.2 bsf LATE,2,0 F1_000437 equ $ ; in [EKLA_PH2.BAS] if I.4 = 0 Then Set PORTB.4 btfss _I,4,0 bsf LATB,4,0 _lbl__71 F1_000438 equ $ ; in [EKLA_PH2.BAS] endif _lbl__69 F1_000439 equ $ ; in [EKLA_PH2.BAS] if klep.5 = 0 Then btfsc klep,5,0 bra _lbl__73 F1_000440 equ $ ; in [EKLA_PH2.BAS] Clear PORTB.1 bcf LATB,1,0 bra _lbl__74 _lbl__73 F1_000441 equ $ ; in [EKLA_PH2.BAS] else F1_000442 equ $ ; in [EKLA_PH2.BAS] Set PORTB.1 bsf LATB,1,0 F1_000443 equ $ ; in [EKLA_PH2.BAS] if I.5 = 0 Then Set PORTB.0 btfss _I,5,0 bsf LATB,0,0 _lbl__76 F1_000444 equ $ ; in [EKLA_PH2.BAS] endif _lbl__74 F1_000447 equ $ ; in [EKLA_PH2.BAS] Set TimVals[2] setf TimVals#2HHH,0 setf TimVals#2HH,0 setf TimVals#2H,0 setf TimVals#2,0 F1_000448 equ $ ; in [EKLA_PH2.BAS] Set PORTD.0 bsf LATD,0,0 F1_000449 equ $ ; in [EKLA_PH2.BAS] Set PORTC.2 bsf LATC,2,0 F1_000451 equ $ ; in [EKLA_PH2.BAS] playing_note = noteAan movff noteAan,playing_note F1_000453 equ $ ; in [EKLA_PH2.BAS] velo = vels[MinVel] movff vels#20,velo F1_000454 equ $ ; in [EKLA_PH2.BAS] TimVals[1] = Cnt + velo movf velo,W,0 addwf Cnt,W,0 movwf PBS_VAR0,0 movlw 0 addwfc CntH,W,0 movwf PBS_VAR0H,0 movlw 0 addwfc CntHH,W,0 movwf PBS_VAR0HH,0 movlw 0 addwfc CntHHH,W,0 movwf PBS_VAR0HHH,0 movff PBS_VAR0,TimVals#1 movff PBS_VAR0H,TimVals#1H movff PBS_VAR0HH,TimVals#1HH movff PBS_VAR0HHH,TimVals#1HHH F1_000455 equ $ ; in [EKLA_PH2.BAS] EndSelect _lbl__45 _lbl__44 F1_000456 equ $ ; in [EKLA_PH2.BAS] Set noteAan setf noteAan,0 F1_000457 equ $ ; in [EKLA_PH2.BAS] Set Resort_flag movlb 1 bsf Resort,0,1 F1_000458 equ $ ; in [EKLA_PH2.BAS] endif _lbl__43 movlb 0 bra _lbl__28 _lbl__40 F1_000459 equ $ ; in [EKLA_PH2.BAS] Case Control_Status movlw 182 subwf statusbyte,W,0 bnz _lbl__78 F1_000460 equ $ ; in [EKLA_PH2.BAS] if Ctrl = 255 Then incf Ctrl,W,0 bnz _lbl__80 F1_000461 equ $ ; in [EKLA_PH2.BAS] Ctrl = Bytein movff Bytein,Ctrl bra _lbl__81 _lbl__80 F1_000462 equ $ ; in [EKLA_PH2.BAS] else F1_000463 equ $ ; in [EKLA_PH2.BAS] value = Bytein movff Bytein,value F1_000464 equ $ ; in [EKLA_PH2.BAS] Controller() rcall Controller F1_000465 equ $ ; in [EKLA_PH2.BAS] endif _lbl__81 F1_000466 equ $ ; in [EKLA_PH2.BAS] EndSelect _lbl__78 _lbl__28 F1_000467 equ $ ; in [EKLA_PH2.BAS] endif _lbl__27 F1_000469 equ $ ; in [EKLA_PH2.BAS] if Resort_flag = 1 Then movlb 1 rrcf Resort,W,1 movlb 0 bnc _lbl__83 F1_000470 equ $ ; in [EKLA_PH2.BAS] idx = SortTimers () rcall SortTimers movff SortTimersResult,idx F1_000471 equ $ ; in [EKLA_PH2.BAS] endif _lbl__83 Check_Timers F1_000474 equ $ ; in [EKLA_PH2.BAS] if idx < NrTasks Then movlw 3 subwf idx,W,0 btfsc STATUS,0,0 bra _lbl__85 F1_000475 equ $ ; in [EKLA_PH2.BAS] if time >= Nxt Then movf Nxt,W,0 subwf Cnt,W,0 movf NxtH,W,0 subwfb CntH,W,0 movf NxtHH,W,0 subwfb CntHH,W,0 movf NxtHHH,W,0 subwfb CntHHH,W,0 bnc _lbl__87 F1_000477 equ $ ; in [EKLA_PH2.BAS] Set Nxt.31 bsf NxtHHH,7,0 F1_000479 equ $ ; in [EKLA_PH2.BAS] Select idx F1_000480 equ $ ; in [EKLA_PH2.BAS] Case 0 movf idx,F,0 bnz _lbl__89 F1_000481 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.2 bcf LATA,2,0 F1_000482 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.0 bcf LATA,0,0 F1_000483 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.4 bcf LATA,4,0 F1_000484 equ $ ; in [EKLA_PH2.BAS] Clear PORTE.0 bcf LATE,0,0 F1_000485 equ $ ; in [EKLA_PH2.BAS] Clear PORTE.2 bcf LATE,2,0 F1_000486 equ $ ; in [EKLA_PH2.BAS] Clear PORTB.1 bcf LATB,1,0 F1_000487 equ $ ; in [EKLA_PH2.BAS] Set TimVals[0] setf TimVals#0HHH,0 setf TimVals#0HH,0 setf TimVals#0H,0 setf TimVals#0,0 F1_000488 equ $ ; in [EKLA_PH2.BAS] Clear old_note clrf old_note,0 bra _lbl__88 _lbl__89 F1_000489 equ $ ; in [EKLA_PH2.BAS] Case 1 movlw 1 subwf idx,W,0 bnz _lbl__92 F1_000490 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.1 bcf LATA,1,0 F1_000491 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.3 bcf LATA,3,0 F1_000492 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.5 bcf LATA,5,0 F1_000493 equ $ ; in [EKLA_PH2.BAS] Clear PORTE.1 bcf LATE,1,0 F1_000494 equ $ ; in [EKLA_PH2.BAS] Clear PORTB.4 bcf LATB,4,0 F1_000495 equ $ ; in [EKLA_PH2.BAS] Clear PORTB.0 bcf LATB,0,0 F1_000496 equ $ ; in [EKLA_PH2.BAS] Set TimVals[1] setf TimVals#1HHH,0 setf TimVals#1HH,0 setf TimVals#1H,0 setf TimVals#1,0 bra _lbl__88 _lbl__92 F1_000497 equ $ ; in [EKLA_PH2.BAS] Case 2 movlw 2 subwf idx,W,0 bnz _lbl__94 F1_000500 equ $ ; in [EKLA_PH2.BAS] Set TimVals[2] setf TimVals#2HHH,0 setf TimVals#2HH,0 setf TimVals#2H,0 setf TimVals#2,0 F1_000501 equ $ ; in [EKLA_PH2.BAS] Clear PORTD.0 bcf LATD,0,0 F1_000502 equ $ ; in [EKLA_PH2.BAS] Clear PORTC.2 bcf LATC,2,0 F1_000503 equ $ ; in [EKLA_PH2.BAS] EndSelect _lbl__94 _lbl__88 F1_000504 equ $ ; in [EKLA_PH2.BAS] Set Resort_flag movlb 1 bsf Resort,0,1 F1_000505 equ $ ; in [EKLA_PH2.BAS] endif _lbl__87 movlb 0 F1_000507 equ $ ; in [EKLA_PH2.BAS] if maxtim = 1 Then btfss timeHHH,7,0 bra _lbl__96 F1_000508 equ $ ; in [EKLA_PH2.BAS] Clear time clrf CntHHH,0 clrf CntHH,0 clrf CntH,0 clrf Cnt,0 F1_000509 equ $ ; in [EKLA_PH2.BAS] Set TimVals lfsr 0,TimVals movlw 12 _pblb__97 setf POSTINC0,0 decfsz WREG,F,0 bra _pblb__97 F1_000510 equ $ ; in [EKLA_PH2.BAS] endif _lbl__96 bra _lbl__98 _lbl__85 F1_000511 equ $ ; in [EKLA_PH2.BAS] else F1_000513 equ $ ; in [EKLA_PH2.BAS] if maxtim = 1 Then Clear time btfss timeHHH,7,0 bra _lbl__100 clrf CntHHH,0 clrf CntHH,0 clrf CntH,0 clrf Cnt,0 _lbl__100 F1_000514 equ $ ; in [EKLA_PH2.BAS] endif _lbl__98 _lbl__10 F1_000517 equ $ ; in [EKLA_PH2.BAS] Loop bra _lbl__8 _lbl__9 F1_000002 equ $ ; in [EKLA_PH2.BAS] Stop _pblb__101 bra _pblb__101 ;--------------------------------------------- F3_000118 equ $ ; in [EKLAPH2_IRQ.Inc] Proc GetMidiIn (), byte GetMidiIn F3_000119 equ $ ; in [EKLAPH2_IRQ.Inc] if IndexIn <> IndexOut Then movf IndexIn,W,0 subwf IndexOut,W,0 bz _lbl__103 F3_000120 equ $ ; in [EKLAPH2_IRQ.Inc] Inc IndexOut incf IndexOut,F,0 F3_000121 equ $ ; in [EKLAPH2_IRQ.Inc] USART_FSR0_Save = USART_FSR0 movff FSR0LH,FSR0SaveIntH movff FSR0L,FSR0SaveInt F3_000122 equ $ ; in [EKLAPH2_IRQ.Inc] USART_FSR0 = VarPtr Ringbuffer lfsr 0,72 F3_000123 equ $ ; in [EKLAPH2_IRQ.Inc] USART_FSR0 = USART_FSR0 + IndexOut movf IndexOut,W,0 addwf FSR0L,F,0 movlw 0 addwfc FSR0LH,F,0 F3_000124 equ $ ; in [EKLAPH2_IRQ.Inc] WREG = INDF0 movf INDF0,W,0 F3_000125 equ $ ; in [EKLAPH2_IRQ.Inc] Result = WREG movlb 2 movwf GetMidiInResult,1 F3_000126 equ $ ; in [EKLAPH2_IRQ.Inc] USART_FSR0 = USART_FSR0_Save movff FSR0SaveIntH,FSR0LH movff FSR0SaveInt,FSR0L F3_000127 equ $ ; in [EKLAPH2_IRQ.Inc] Set STATUS.0 bsf STATUS,0,0 F3_000128 equ $ ; in [EKLAPH2_IRQ.Inc] RET return 0 movlb 0 bra _lbl__104 _lbl__103 F3_000129 equ $ ; in [EKLAPH2_IRQ.Inc] else F3_000130 equ $ ; in [EKLAPH2_IRQ.Inc] WREG = 255 setf WREG,0 F3_000131 equ $ ; in [EKLAPH2_IRQ.Inc] Result = WREG movlb 2 movwf GetMidiInResult,1 F3_000132 equ $ ; in [EKLAPH2_IRQ.Inc] btfss STATUS,C btfss STATUS,C F3_000133 equ $ ; in [EKLAPH2_IRQ.Inc] RET return 0 F3_000134 equ $ ; in [EKLAPH2_IRQ.Inc] endif _lbl__104 movlb 0 F3_000135 equ $ ; in [EKLAPH2_IRQ.Inc] EndProc return 0 ; EndProc ;--------------------------------------------- F1_000519 equ $ ; in [EKLA_PH2.BAS] Proc SortTimers (), byte SortTimers F1_000522 equ $ ; in [EKLA_PH2.BAS] Set Result movlb 2 setf SortTimersResult,1 F1_000523 equ $ ; in [EKLA_PH2.BAS] Set Nxt.31 bsf NxtHHH,7,0 F1_000524 equ $ ; in [EKLA_PH2.BAS] Clear I clrf _I,0 F1_000525 equ $ ; in [EKLA_PH2.BAS] Do _lbl__105 movlb 0 F1_000526 equ $ ; in [EKLA_PH2.BAS] if TimVals[I] < Nxt Then bcf STATUS,0,0 rlcf _I,W,0 movwf FSR0L,0 clrf FSR0H,0 rlcf FSR0H,F,0 rlcf FSR0L,F,0 rlcf FSR0H,F,0 movlw 60 addwf FSR0L,F,0 movlw 0 addwfc FSR0H,F,0 movff INDF0,PBS_VAR0 movff PREINC0,PBS_VAR0H movff PREINC0,PBS_VAR0HH movff PREINC0,PBS_VAR0HHH movf Nxt,W,0 subwf PBS_VAR0,W,0 movf NxtH,W,0 subwfb PBS_VAR0H,W,0 movf NxtHH,W,0 subwfb PBS_VAR0HH,W,0 movf NxtHHH,W,0 subwfb PBS_VAR0HHH,W,0 bc _lbl__109 F1_000527 equ $ ; in [EKLA_PH2.BAS] Nxt = TimVals[I] bcf STATUS,0,0 rlcf _I,W,0 movwf FSR0L,0 clrf FSR0H,0 rlcf FSR0H,F,0 rlcf FSR0L,F,0 rlcf FSR0H,F,0 movlw 60 addwf FSR0L,F,0 movlw 0 addwfc FSR0H,F,0 movff INDF0,Nxt movff PREINC0,NxtH movff PREINC0,NxtHH movff PREINC0,NxtHHH F1_000528 equ $ ; in [EKLA_PH2.BAS] Result = I movff _I,SortTimersResult F1_000529 equ $ ; in [EKLA_PH2.BAS] endif _lbl__109 F1_000530 equ $ ; in [EKLA_PH2.BAS] Inc I incf _I,F,0 _lbl__107 F1_000531 equ $ ; in [EKLA_PH2.BAS] Loop Until I > LastTask movlw 3 subwf _I,W,0 bnc _lbl__105 _lbl__106 F1_000532 equ $ ; in [EKLA_PH2.BAS] Clear Resort_flag movlb 1 bcf Resort,0,1 F1_000533 equ $ ; in [EKLA_PH2.BAS] EndProc movlb 0 return 0 ; EndProc ;--------------------------------------------- F1_000547 equ $ ; in [EKLA_PH2.BAS] Proc Controller () Controller F1_000548 equ $ ; in [EKLA_PH2.BAS] Select Ctrl F1_000549 equ $ ; in [EKLA_PH2.BAS] Case 66 movlw 66 subwf Ctrl,W,0 bnz _lbl__111 F1_000551 equ $ ; in [EKLA_PH2.BAS] if value = 0 Then movf value,F,0 bnz _lbl__114 F1_000552 equ $ ; in [EKLA_PH2.BAS] PowerDown () rcall PowerDown bra _lbl__115 _lbl__114 F1_000553 equ $ ; in [EKLA_PH2.BAS] else F1_000554 equ $ ; in [EKLA_PH2.BAS] AllNotesOff () rcall AllNotesOff F1_000555 equ $ ; in [EKLA_PH2.BAS] endif _lbl__115 bra _lbl__110 _lbl__111 F1_000557 equ $ ; in [EKLA_PH2.BAS] Case 69 movlw 69 subwf Ctrl,W,0 bnz _lbl__117 F1_000558 equ $ ; in [EKLA_PH2.BAS] if value = 0 Then movf value,F,0 bnz _lbl__119 F1_000559 equ $ ; in [EKLA_PH2.BAS] Clear CC69 clrf CC69,0 bra _lbl__120 _lbl__119 F1_000560 equ $ ; in [EKLA_PH2.BAS] else F1_000561 equ $ ; in [EKLA_PH2.BAS] Set CC69 setf CC69,0 F1_000562 equ $ ; in [EKLA_PH2.BAS] endif _lbl__120 bra _lbl__110 _lbl__117 F1_000563 equ $ ; in [EKLA_PH2.BAS] Case 123 movlw 123 subwf Ctrl,W,0 bnz _lbl__122 F1_000564 equ $ ; in [EKLA_PH2.BAS] AllNotesOff () rcall AllNotesOff F1_000565 equ $ ; in [EKLA_PH2.BAS] EndSelect _lbl__122 _lbl__110 F1_000566 equ $ ; in [EKLA_PH2.BAS] Set Ctrl setf Ctrl,0 F1_000567 equ $ ; in [EKLA_PH2.BAS] EndProc return 0 ; EndProc ;--------------------------------------------- F1_000612 equ $ ; in [EKLA_PH2.BAS] Proc Velo_Lookup () Velo_Lookup F1_000629 equ $ ; in [EKLA_PH2.BAS] vels[1] = 52 movlb 1 clrf vels#1H,1 movlw 52 movwf vels#1,1 F1_000632 equ $ ; in [EKLA_PH2.BAS] For I = 2 To 127 movlw 2 movwf _I,0 _frlb__123 movlb 0 movlw 128 subwf _I,W,0 bc _nxlb__124 F1_000633 equ $ ; in [EKLA_PH2.BAS] vels[I] = vels[I-1] + 32.8 decf _I,W,0 movwf PBS_VAR2,0 lfsr 0,vels bcf STATUS,0,0 rlcf PBS_VAR2,W,0 addwf FSR0L,F,0 movlw 0 addwfc FSR0H,F,0 movff POSTINC0,PBS_VAR1 movff INDF0,PBS_VAR1H movff PBS_VAR1,PP_AARG movff PBS_VAR1H,PP_AARGH call _Uns_Int16_ToFl32 movff PP_AARG,PP_BARG movff PP_AARGH,PP_BARGH movff PP_AARGHH,PP_BARGHH movff PP_AARGHHH,PP_BARGHHH movlw 51 movwf PP_AARGHHH,0 movwf PP_AARGHH,0 movlw 3 movwf PP_AARGH,0 movlw 132 movwf PP_AARG,0 call __fpadd_32__ call _Fl32_To_Int32 movwf PBS_VAR0,0 movff PP_AARGH,PBS_VAR0H lfsr 0,vels bcf STATUS,0,0 rlcf _I,W,0 addwf FSR0L,F,0 movlw 0 addwfc FSR0H,F,0 movff PBS_VAR0,POSTINC0 movff PBS_VAR0H,INDF0 _ctlb__125 F1_000634 equ $ ; in [EKLA_PH2.BAS] Next I incf _I,F,0 bnc _frlb__123 _nxlb__124 F1_000640 equ $ ; in [EKLA_PH2.BAS] For I = 1 To 127 movlw 1 movwf _I,0 _frlb__126 movlw 128 subwf _I,W,0 bc _nxlb__127 F1_000641 equ $ ; in [EKLA_PH2.BAS] vels[I] = vels[I] >> 1 lfsr 0,vels bcf STATUS,0,0 rlcf _I,W,0 addwf FSR0L,F,0 movlw 0 addwfc FSR0H,F,0 movff POSTINC0,PBS_VAR1 movff INDF0,PBS_VAR1H bcf STATUS,0,0 rrcf PBS_VAR1H,W,0 movwf PBS_VAR0H,0 rrcf PBS_VAR1,W,0 movwf PBS_VAR0,0 lfsr 0,vels bcf STATUS,0,0 rlcf _I,W,0 addwf FSR0L,F,0 movlw 0 addwfc FSR0H,F,0 movff PBS_VAR0,POSTINC0 movff PBS_VAR0H,INDF0 _ctlb__128 F1_000642 equ $ ; in [EKLA_PH2.BAS] Next I incf _I,F,0 bnc _frlb__126 _nxlb__127 F1_000647 equ $ ; in [EKLA_PH2.BAS] EndProc return 0 ; EndProc ;--------------------------------------------- F1_000649 equ $ ; in [EKLA_PH2.BAS] Proc Kleppen_lookup () Kleppen_lookup F1_000669 equ $ ; in [EKLA_PH2.BAS] For I = 0 To 53 clrf _I,0 _frlb__129 movlw 54 subwf _I,W,0 bc _nxlb__130 F1_000670 equ $ ; in [EKLA_PH2.BAS] Kleppen[I] = 0 clrf PRODL,0 lfsr 0,Kleppen movf _I,W,0 movff PRODL,PLUSW0 _ctlb__131 F1_000671 equ $ ; in [EKLA_PH2.BAS] Next I incf _I,F,0 bnc _frlb__129 _nxlb__130 F1_000672 equ $ ; in [EKLA_PH2.BAS] Kleppen[54] = %00000001 movlb 2 movlw 1 movwf Kleppen#54,1 F1_000673 equ $ ; in [EKLA_PH2.BAS] Kleppen[55] = %00000000 clrf Kleppen#55,1 F1_000674 equ $ ; in [EKLA_PH2.BAS] Kleppen[56] = %00000010 movlw 2 movwf Kleppen#56,1 F1_000675 equ $ ; in [EKLA_PH2.BAS] Kleppen[57] = %00001000 movlw 8 movwf Kleppen#57,1 F1_000676 equ $ ; in [EKLA_PH2.BAS] Kleppen[58] = %00001100 movlw 12 movwf Kleppen#58,1 F1_000677 equ $ ; in [EKLA_PH2.BAS] Kleppen[59] = %00001000 movlw 8 movwf Kleppen#59,1 F1_000678 equ $ ; in [EKLA_PH2.BAS] Kleppen[60] = %00001000 movwf Kleppen#60,1 F1_000679 equ $ ; in [EKLA_PH2.BAS] Kleppen[61] = %00001100 movlw 12 movwf Kleppen#61,1 F1_000680 equ $ ; in [EKLA_PH2.BAS] Kleppen[62] = %00001000 movlw 8 movwf Kleppen#62,1 F1_000681 equ $ ; in [EKLA_PH2.BAS] Kleppen[63] = %00001000 movwf Kleppen#63,1 F1_000682 equ $ ; in [EKLA_PH2.BAS] Kleppen[64] = %00001000 movwf Kleppen#64,1 F1_000683 equ $ ; in [EKLA_PH2.BAS] Kleppen[65] = %00001000 movwf Kleppen#65,1 F1_000684 equ $ ; in [EKLA_PH2.BAS] Kleppen[66] = %00001000 movwf Kleppen#66,1 F1_000685 equ $ ; in [EKLA_PH2.BAS] Kleppen[67] = %00001000 movwf Kleppen#67,1 F1_000686 equ $ ; in [EKLA_PH2.BAS] Kleppen[68] = %00011000 movlw 24 movwf Kleppen#68,1 F1_000687 equ $ ; in [EKLA_PH2.BAS] Kleppen[69] = %00011000 movwf Kleppen#69,1 F1_000688 equ $ ; in [EKLA_PH2.BAS] Kleppen[70] = %00101000 movlw 40 movwf Kleppen#70,1 F1_000689 equ $ ; in [EKLA_PH2.BAS] Kleppen[71] = %00111000 movlw 56 movwf Kleppen#71,1 F1_000690 equ $ ; in [EKLA_PH2.BAS] Kleppen[72] = %00111000 movwf Kleppen#72,1 F1_000691 equ $ ; in [EKLA_PH2.BAS] Kleppen[73] = %00000001 movlw 1 movwf Kleppen#73,1 F1_000692 equ $ ; in [EKLA_PH2.BAS] Kleppen[74] = %00000000 clrf Kleppen#74,1 F1_000693 equ $ ; in [EKLA_PH2.BAS] Kleppen[75] = %00000010 movlw 2 movwf Kleppen#75,1 F1_000694 equ $ ; in [EKLA_PH2.BAS] Kleppen[76] = %00001100 movlw 12 movwf Kleppen#76,1 F1_000695 equ $ ; in [EKLA_PH2.BAS] Kleppen[77] = %00001000 movlw 8 movwf Kleppen#77,1 F1_000696 equ $ ; in [EKLA_PH2.BAS] Kleppen[78] = %00001000 movwf Kleppen#78,1 F1_000697 equ $ ; in [EKLA_PH2.BAS] Kleppen[79] = %00001000 movwf Kleppen#79,1 F1_000698 equ $ ; in [EKLA_PH2.BAS] Kleppen[80] = %00001000 movwf Kleppen#80,1 F1_000699 equ $ ; in [EKLA_PH2.BAS] Kleppen[81] = %00001000 movwf Kleppen#81,1 F1_000700 equ $ ; in [EKLA_PH2.BAS] Kleppen[82] = %00001100 movlw 12 movwf Kleppen#82,1 F1_000701 equ $ ; in [EKLA_PH2.BAS] Kleppen[83] = %00001000 movlw 8 movwf Kleppen#83,1 F1_000702 equ $ ; in [EKLA_PH2.BAS] Kleppen[84] = %00001000 movwf Kleppen#84,1 F1_000703 equ $ ; in [EKLA_PH2.BAS] Kleppen[85] = %00001000 movwf Kleppen#85,1 F1_000704 equ $ ; in [EKLA_PH2.BAS] Kleppen[86] = %00001000 movwf Kleppen#86,1 F1_000705 equ $ ; in [EKLA_PH2.BAS] Kleppen[87] = %00001100 movlw 12 movwf Kleppen#87,1 F1_000706 equ $ ; in [EKLA_PH2.BAS] Kleppen[88] = %00001001 movlw 9 movwf Kleppen#88,1 F1_000707 equ $ ; in [EKLA_PH2.BAS] Kleppen[89] = %00001000 movlw 8 movwf Kleppen#89,1 F1_000708 equ $ ; in [EKLA_PH2.BAS] Kleppen[90] = %00001100 movlw 12 movwf Kleppen#90,1 F1_000709 equ $ ; in [EKLA_PH2.BAS] Kleppen[91] = %00001001 movlw 9 movwf Kleppen#91,1 F1_000710 equ $ ; in [EKLA_PH2.BAS] Kleppen[92] = %00001100 movlw 12 movwf Kleppen#92,1 F1_000711 equ $ ; in [EKLA_PH2.BAS] Kleppen[93] = %00001000 movlw 8 movwf Kleppen#93,1 F1_000712 equ $ ; in [EKLA_PH2.BAS] Kleppen[94] = %00000000 clrf Kleppen#94,1 F1_000713 equ $ ; in [EKLA_PH2.BAS] Kleppen[95] = %00000100 movlw 4 movwf Kleppen#95,1 F1_000714 equ $ ; in [EKLA_PH2.BAS] Kleppen[96] = %00001000 movlw 8 movwf Kleppen#96,1 F1_000715 equ $ ; in [EKLA_PH2.BAS] Kleppen[97] = %00001010 movlw 10 movwf Kleppen#97,1 F1_000716 equ $ ; in [EKLA_PH2.BAS] Kleppen[98] = %00001010 movwf Kleppen#98,1 F1_000717 equ $ ; in [EKLA_PH2.BAS] Kleppen[99] = %00001010 movwf Kleppen#99,1 F1_000718 equ $ ; in [EKLA_PH2.BAS] Kleppen[100] = %00001000 movlw 8 movwf Kleppen#100,1 F1_000719 equ $ ; in [EKLA_PH2.BAS] Kleppen[101] = %00001000 movwf Kleppen#101,1 F1_000720 equ $ ; in [EKLA_PH2.BAS] Kleppen[102] = %00001000 movwf Kleppen#102,1 F1_000721 equ $ ; in [EKLA_PH2.BAS] Kleppen[103] = %00001000 movwf Kleppen#103,1 F1_000722 equ $ ; in [EKLA_PH2.BAS] Kleppen[104] = %00101000 movlw 40 movwf Kleppen#104,1 F1_000723 equ $ ; in [EKLA_PH2.BAS] Kleppen[105] = %00101000 movwf Kleppen#105,1 F1_000724 equ $ ; in [EKLA_PH2.BAS] For I = 106 To 127 movlw 106 movwf _I,0 _frlb__132 movlb 0 movlw 128 subwf _I,W,0 bc _nxlb__133 F1_000725 equ $ ; in [EKLA_PH2.BAS] Kleppen[I] = 0 clrf PRODL,0 lfsr 0,Kleppen movf _I,W,0 movff PRODL,PLUSW0 _ctlb__134 F1_000726 equ $ ; in [EKLA_PH2.BAS] Next I incf _I,F,0 bnc _frlb__132 _nxlb__133 F1_000727 equ $ ; in [EKLA_PH2.BAS] EndProc return 0 ; EndProc ;--------------------------------------------- F1_000569 equ $ ; in [EKLA_PH2.BAS] Proc PowerDown() PowerDown F1_000571 equ $ ; in [EKLA_PH2.BAS] Set TimVals lfsr 0,TimVals movlw 12 _pblb__135 setf POSTINC0,0 decfsz WREG,F,0 bra _pblb__135 F1_000572 equ $ ; in [EKLA_PH2.BAS] Clear PORTD.1 bcf LATD,1,0 F1_000573 equ $ ; in [EKLA_PH2.BAS] Clear PORTC.3 bcf LATC,3,0 F1_000574 equ $ ; in [EKLA_PH2.BAS] Clear PORTB.0 bcf LATB,0,0 F1_000575 equ $ ; in [EKLA_PH2.BAS] Clear PORTB.4 bcf LATB,4,0 F1_000576 equ $ ; in [EKLA_PH2.BAS] Clear PORTE.1 bcf LATE,1,0 F1_000577 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.5 bcf LATA,5,0 F1_000578 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.3 bcf LATA,3,0 F1_000579 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.1 bcf LATA,1,0 F1_000580 equ $ ; in [EKLA_PH2.BAS] Clear PORTD.0 bcf LATD,0,0 F1_000581 equ $ ; in [EKLA_PH2.BAS] Clear PORTC.2 bcf LATC,2,0 F1_000582 equ $ ; in [EKLA_PH2.BAS] Clear PORTB.1 bcf LATB,1,0 F1_000583 equ $ ; in [EKLA_PH2.BAS] Clear PORTE.2 bcf LATE,2,0 F1_000584 equ $ ; in [EKLA_PH2.BAS] Clear PORTE.0 bcf LATE,0,0 F1_000585 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.4 bcf LATA,4,0 F1_000586 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.0 bcf LATA,0,0 F1_000587 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.2 bcf LATA,2,0 F1_000588 equ $ ; in [EKLA_PH2.BAS] Set Resort_flag movlb 1 bsf Resort,0,1 F1_000589 equ $ ; in [EKLA_PH2.BAS] EndProc movlb 0 return 0 ; EndProc ;--------------------------------------------- F1_000591 equ $ ; in [EKLA_PH2.BAS] Proc AllNotesOff () AllNotesOff F1_000592 equ $ ; in [EKLA_PH2.BAS] Set TimVals lfsr 0,TimVals movlw 12 _pblb__136 setf POSTINC0,0 decfsz WREG,F,0 bra _pblb__136 F1_000593 equ $ ; in [EKLA_PH2.BAS] Clear PORTD.1 bcf LATD,1,0 F1_000594 equ $ ; in [EKLA_PH2.BAS] Clear PORTC.3 bcf LATC,3,0 F1_000595 equ $ ; in [EKLA_PH2.BAS] Clear PORTB.0 bcf LATB,0,0 F1_000596 equ $ ; in [EKLA_PH2.BAS] Clear PORTB.4 bcf LATB,4,0 F1_000597 equ $ ; in [EKLA_PH2.BAS] Clear PORTE.1 bcf LATE,1,0 F1_000598 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.5 bcf LATA,5,0 F1_000599 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.3 bcf LATA,3,0 F1_000600 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.1 bcf LATA,1,0 F1_000601 equ $ ; in [EKLA_PH2.BAS] Clear PORTD.0 bcf LATD,0,0 F1_000602 equ $ ; in [EKLA_PH2.BAS] Clear PORTC.2 bcf LATC,2,0 F1_000603 equ $ ; in [EKLA_PH2.BAS] Clear PORTB.1 bcf LATB,1,0 F1_000604 equ $ ; in [EKLA_PH2.BAS] Clear PORTE.2 bcf LATE,2,0 F1_000605 equ $ ; in [EKLA_PH2.BAS] Clear PORTE.0 bcf LATE,0,0 F1_000606 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.4 bcf LATA,4,0 F1_000607 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.0 bcf LATA,0,0 F1_000608 equ $ ; in [EKLA_PH2.BAS] Clear PORTA.2 bcf LATA,2,0 F1_000609 equ $ ; in [EKLA_PH2.BAS] Set Resort_flag movlb 1 bsf Resort,0,1 F1_000610 equ $ ; in [EKLA_PH2.BAS] EndProc movlb 0 return 0 ; EndProc ;--------------------------------------------- F1_EOF equ $ ; EKLA_PH2.BAS __eof ;--------------------------------------------- ; CONFIG FUSES config DEBUG = off config XINST = off config STVREN = off config FCMEN = off config OSC = HSPLL config IESO = off config WDT = off config WDTPS = 128 config BOREN = SBORDIS config BORV = 2 config MCLRE = on config LPT1OSC = on config PBADEN = off config CCP2MX = PORTC config LVP = off config CP0 = off config CP1 = off config CP2 = off config CP3 = off config CPB = off config CPD = off config WRT0 = off config WRT1 = off config WRT2 = off config WRT3 = off config WRTB = off config WRTC = off config WRTD = off config EBTR0 = off config EBTR1 = off config EBTR2 = off config EBTR3 = off config EBTRB = off config PWRT = on end