'************************ 'Header file for 18F4620 '************************ Device = 18F4620 $define _Proton Optimiser_Level = 3 ' Full optimisation Declare Dead_Code_Remove = On '/Off Declare Icd_Req = 1 ' to allow ICD programming and PICkit2 ' params: On or Off, or True or False, or 1, 0 ' note that the ICD uses pins RB5, RB6, RB7 Declare Create_Coff = 1 ' generate a .COF file for the debugger in MPLAB Declare Xtal = 40 ' 10MHz Xtal * 4 PLL Symbol PWMminF = 2442 ' lowest possible pwm frequency. Config_Start Debug = OFF ' Background debugger disabled; RB6/RB7 configured as I/O 'DEBUG = ON ; Enabled 'DEBUG = OFF ; Disabled XINST = OFF ' Instruction set extension mode disabled (only required for improved float support] 'XINST = OFF ; Disabled 'XINST = ON ; Enabled STVREN = OFF ' Reset on stack overflow/underflow disabled or enabled 'STVREN = OFF ; Disabled 'STVREN = ON ; Enabled FCMEN = OFF ' Fail-Safe Clock Monitor disabled - makes no apparent difference 'FCMEN = OFF ; Disabled 'FCMEN = ON ; Enabled OSC = HSPLL ' PLL active to set clock to 4x Xtal freq.. '; Oscillator Selection: 'OSC = LP ; LP 'OSC = XT ; XT 'OSC = HS ; HS 'OSC = RC ; RC 'OSC = EC ; EC-OSC2 AS Clock OUT 'OSC = ECIO6 ; EC-OSC2 AS RA6 'OSC = HSPLL ; HS-PLL Enabled 'OSC = RCIO6 ; RC-OSC2 AS RA6 'OSC = INTIO67 ; INTRC-OSC2 AS RA6, OSC1 AS RA7 'OSC = INTIO7 ; INTRC-OSC2 AS Clock OUT, OSC1 AS RA7 IESO = OFF ' Two-Speed Start-up disabled '; Internal External Osc. SWITCH Over: 'IESO = OFF ; Disabled 'IESO = ON ; Enabled WDT = OFF ' no watchdog timer 'WDT = OFF ; Disabled 'WDT = ON ; Enabled WDTPS = 128 ' Watchdog oscillator prescaler 1:128 , Johannes had it = 1 '; Watchdog Postscaler: 'WDTPS = 1 ; 1:1 'WDTPS = 2 ; 1:2 'WDTPS = 4 ; 1:4 'WDTPS = 8 ; 1:8 'WDTPS = 16 ; 1:16 'WDTPS = 32 ; 1:32 'WDTPS = 64 ; 1:64 'WDTPS = 128 ; 1:128 'WDTPS = 256 ; 1:256 'WDTPS = 512 ; 1:512 'WDTPS = 1024 ; 1:1024 'WDTPS = 2048 ; 1:2048 'WDTPS = 4096 ; 1:4096 'WDTPS = 8192 ; 1:8192 'WDTPS = 16384 ; 1:16384 'WDTPS = 32768 ; 1:32768 BOREN = SBORDIS ' was off, changed to on by gwr ' off= Brown-out Reset disabled in hardware and software 'Johannes had it set to ON '; Brown-OUT RESET: 'BOREN = OFF ; Disabled 'BOREN = ON ; SBOREN Enabled 'BOREN = NOSLP ; Enabled except SLEEP, SBOREN Disabled 'BOREN = SBORDIS ; Enabled, SBOREN Disabled BORV = 2 ' brown out voltage '; Brown-OUT Voltage: 'BORV = 0 ; Maximum setting 'BORV = 1 ; 'BORV = 2 ; 'BORV = 3 ; Minimum setting MCLRE = On ' MCLR pin enabled, RE3 input pin disabled 'MCLRE = OFF ; Disabled 'MCLRE = ON ; Enabled LPT1OSC = On ' Timer1 operates in standard power mode , Johannes had it ON '; T1 Oscillator ENABLE: 'LPT1OSC = OFF ; Disabled 'LPT1OSC = ON ; Enabled PBADEN = OFF ' PORTB<4:0> pins are configured as digital I/O on Reset '; PORTB A/D ENABLE: 'PBADEN = OFF ; PORTB<4:0> digital ON RESET 'PBADEN = ON ; PORTB<4:0> analog ON RESET CCP2MX = PORTC ' CCP2 input/output is multiplexed with RC1 '; CCP2 MUX: 'CCP2MX = PORTBE ; Multiplexed WITH RB3 'CCP2MX = PORTC ; Multiplexed WITH RC1 LVP = OFF ' On ' Single-Supply ICSP enabled/disabled , Johannes had it Off '; Low Voltage ICSP: 'LVP = OFF ; Disabled 'LVP = ON ; Enabled CP0 = OFF ' Block 0 (000800-001FFFh) not code-protected '; CODE Protection Block 0: 'CP0 = ON ; Enabled 'CP0 = OFF ; Disabled CP1 = OFF ' Block 1 (002000-003FFFh) not code-protected 'CP1 = ON ; Enabled '; CODE Protection Block 2: 'CP2 = ON ; Enabled CP2 = OFF ; Disabled '; CODE Protection Block 3: 'CP3 = ON ; Enabled CP3 = OFF ; Disabled CPB = OFF ' Boot block (000000-0007FFh) not code-protected '; Boot Block CODE Protection: 'CPB = ON ; Enabled 'CPB = OFF ; Disabled CPD = OFF ' Data EEPROM not code-protected 'CPD = ON ; Enabled 'CPD = OFF ; Disabled '; WRITE Protection Block 0: 'WRT0 = ON ; Enabled WRT0 = OFF ; Disabled '; WRITE Protection Block 1: 'WRT1 = ON ; Enabled WRT1 = OFF ; Disabled '; WRITE Protection Block 2: 'WRT2 = ON ; Enabled WRT2 = OFF ; Disabled '; WRITE Protection Block 3: 'WRT3 = ON ; Enabled WRT3 = OFF ; Disabled '; Boot Block WRITE Protection: 'WRTB = ON ; Enabled WRTB = OFF ; Disabled '; Configuration REGISTER WRITE Protection: 'WRTC = ON ; Enabled WRTC = OFF ; Disabled '; DATA EEPROM Write Protection: 'WRTD = ON ; Enabled WRTD = OFF ; Disabled '; Table READ Protection Block 0: 'EBTR0 = ON ; Enabled EBTR0 = OFF ; Disabled '; Table READ Protection Block 1: 'EBTR1 = ON ; Enabled EBTR1 = OFF ; Disabled '; Table READ Protection Block 2: 'EBTR2 = ON ; Enabled EBTR2 = OFF ; Disabled '; Table READ Protection Block 3: 'EBTR3 = ON ; Enabled EBTR3 = OFF ; Disabled '; Boot Block Table READ Protection: 'EBTRB = ON ; Enabled EBTRB = OFF ; Disabled PWRT = On 'OFF ' power up timer (66ms) 'PWRT = ON ; Enabled 'PWRT = OFF ; Disabled Config_End 'Fuse NAME Definitions '[CONFIGSTART] 'CONFIG1H EQU 0X300001 'CONFIG2L EQU 0X300002 'CONFIG2H EQU 0X300003 'CONFIG3H EQU 0X300005 'CONFIG4L EQU 0X300006 'CONFIG5L EQU 0X300008 'CONFIG5H EQU 0X300009 'CONFIG6L EQU 0X30000A 'CONFIG6H EQU 0X30000B 'CONFIG7L EQU 0X30000C 'CONFIG7H EQU 0X30000D '; CONFIG1H Options 'OSC_LP_1 EQU 0XF0 ; LP 'OSC_XT_1 EQU 0XF1 ; XT 'OSC_HS_1 EQU 0XF2 ; HS 'OSC_RC_1 EQU 0XF3 ; RC 'OSC_EC_1 EQU 0XF4 ; EC-OSC2 AS Clock OUT 'OSC_ECIO6_1 EQU 0XF5 ; EC-OSC2 AS RA6 'OSC_HSPLL_1 EQU 0XF6 ; HS-PLL Enabled 'OSC_RCIO6_1 EQU 0XF7 ; RC-OSC2 AS RA6 'OSC_INTIO67_1 EQU 0XF8 ; INTRC-OSC2 AS RA6, OSC1 AS RA7 'OSC_INTIO7_1 EQU 0XF9 ; INTRC-OSC2 AS Clock OUT, OSC1 AS RA7 'FCMEN_OFF_1 EQU 0XBF ; Disabled 'FCMEN_ON_1 EQU 0XFF ; Enabled 'IESO_OFF_1 EQU 0X7F ; Disabled 'IESO_ON_1 EQU 0XFF ; Enabled '; CONFIG2L Options 'PWRT_ON_2 EQU 0XFE ; Enabled 'PWRT_OFF_2 EQU 0XFF ; Disabled 'BOREN_OFF_2 EQU 0XF9 ; Disabled 'BOREN_ON_2 EQU 0XFB ; SBOREN Enabled 'BOREN_NOSLP_2 EQU 0XFD ; Enabled except SLEEP, SBOREN Disabled 'BOREN_SBORDIS_2 EQU 0XFF ; Enabled, SBOREN Disabled 'BORV_0_2 EQU 0XE7 ; Maximum setting 'BORV_1_2 EQU 0XEF ; 'BORV_2_2 EQU 0XF7 ; 'BORV_3_2 EQU 0XFF ; Minimum setting '; CONFIG2H Options 'WDT_OFF_2 EQU 0XFE ; Disabled 'WDT_ON_2 EQU 0XFF ; Enabled 'WDTPS_1_2 EQU 0XE1 ; 1:1 'WDTPS_2_2 EQU 0XE3 ; 1:2 'WDTPS_4_2 EQU 0XE5 ; 1:4 'WDTPS_8_2 EQU 0XE7 ; 1:8 'WDTPS_16_2 EQU 0XE9 ; 1:16 'WDTPS_32_2 EQU 0XEB ; 1:32 'WDTPS_64_2 EQU 0XED ; 1:64 'WDTPS_128_2 EQU 0XEF ; 1:128 'WDTPS_256_2 EQU 0XF1 ; 1:256 'WDTPS_512_2 EQU 0XF3 ; 1:512 'WDTPS_1024_2 EQU 0XF5 ; 1:1024 'WDTPS_2048_2 EQU 0XF7 ; 1:2048 'WDTPS_4096_2 EQU 0XF9 ; 1:4096 'WDTPS_8192_2 EQU 0XFB ; 1:8192 'WDTPS_16384_2 EQU 0XFD ; 1:16384 'WDTPS_32768_2 EQU 0XFF ; 1:32768 '; CONFIG3H Options 'MCLRE_OFF_3 EQU 0X7F ; Disabled 'MCLRE_ON_3 EQU 0XFF ; Enabled 'LPT1OSC_OFF_3 EQU 0XFB ; Disabled 'LPT1OSC_ON_3 EQU 0XFF ; Enabled 'PBADEN_OFF_3 EQU 0XFD ; PORTB<4:0> digital ON RESET 'PBADEN_ON_3 EQU 0XFF ; PORTB<4:0> analog ON RESET 'CCP2MX_PORTBE_3 EQU 0XFE ; Multiplexed WITH RB3 'CCP2MX_PORTC_3 EQU 0XFF ; Multiplexed WITH RC1 '; CONFIG4L Options 'STVREN_OFF_4 EQU 0XFE ; Disabled 'STVREN_ON_4 EQU 0XFF ; Enabled 'LVP_OFF_4 EQU 0XFB ; Disabled 'LVP_ON_4 EQU 0XFF ; Enabled 'XINST_OFF_4 EQU 0XBF ; Disabled 'XINST_ON_4 EQU 0XFF ; Enabled 'DEBUG_ON_4 EQU 0X7F ; Enabled 'DEBUG_OFF_4 EQU 0XFF ; Disabled '; CONFIG5L Options 'CP0_ON_5 EQU 0XFE ; Enabled 'CP0_OFF_5 EQU 0XFF ; Disabled 'CP1_ON_5 EQU 0XFD ; Enabled 'CP1_OFF_5 EQU 0XFF ; Disabled 'CP2_ON_5 EQU 0XFB ; Enabled 'CP2_OFF_5 EQU 0XFF ; Disabled 'CP3_ON_5 EQU 0XF7 ; Enabled 'CP3_OFF_5 EQU 0XFF ; Disabled '; CONFIG5H Options 'CPB_ON_5 EQU 0XBF ; Enabled 'CPB_OFF_5 EQU 0XFF ; Disabled 'CPD_ON_5 EQU 0X7F ; Enabled 'CPD_OFF_5 EQU 0XFF ; Disabled '; CONFIG6L Options 'WRT0_ON_6 EQU 0XFE ; Enabled 'WRT0_OFF_6 EQU 0XFF ; Disabled 'WRT1_ON_6 EQU 0XFD ; Enabled 'WRT1_OFF_6 EQU 0XFF ; Disabled 'WRT2_ON_6 EQU 0XFB ; Enabled 'WRT2_OFF_6 EQU 0XFF ; Disabled 'WRT3_ON_6 EQU 0XF7 ; Enabled 'WRT3_OFF_6 EQU 0XFF ; Disabled '; CONFIG6H Options 'WRTB_ON_6 EQU 0XBF ; Enabled 'WRTB_OFF_6 EQU 0XFF ; Disabled 'WRTC_ON_6 EQU 0XDF ; Enabled 'WRTC_OFF_6 EQU 0XFF ; Disabled 'WRTD_ON_6 EQU 0X7F ; Enabled 'WRTD_OFF_6 EQU 0XFF ; Disabled '; CONFIG7L Options 'EBTR0_ON_7 EQU 0XFE ; Enabled 'EBTR0_OFF_7 EQU 0XFF ; Disabled 'EBTR1_ON_7 EQU 0XFD ; Enabled 'EBTR1_OFF_7 EQU 0XFF ; Disabled 'EBTR2_ON_7 EQU 0XFB ; Enabled 'EBTR2_OFF_7 EQU 0XFF ; Disabled 'EBTR3_ON_7 EQU 0XF7 ; Enabled 'EBTR3_OFF_7 EQU 0XFF ; Disabled '; CONFIG7H Options 'EBTRB_ON_7 EQU 0XBF ; Enabled 'EBTRB_OFF_7 EQU 0XFF ; Disabled 'DEVID1 EQU 0X3FFFFE 'DEVID2 EQU 0X3FFFFF 'IDLOC0 EQU 0X200000 'IDLOC1 EQU 0X200001 'IDLOC2 EQU 0X200002 'IDLOC3 EQU 0X200003 'IDLOC4 EQU 0X200004 'IDLOC5 EQU 0X200005 'IDLOC6 EQU 0X200006 'IDLOC7 EQU 0X200007 '[CONFIGEND] 'DEFAULT Configuration Definitions '[DEFCONFIGSTART] 'ifndef CONFIG_REQ 'ifdef PLL@REQ ; DO we require the PLL ? '__config CONFIG1H, OSC_HSPLL_1 'ELSE '__config CONFIG1H, OSC_HS_1 'endif '__config CONFIG2L, BOREN_ON_2 & BORV_3_2 & PWRT_ON_2 'ifdef WATCHDOG_REQ ; DO we require the WATCHDOG ? '__config CONFIG2H, WDT_ON_2 & WDTPS_128_2 'ELSE '__config CONFIG2H, WDT_OFF_2 & WDTPS_128_2 'endif '__config CONFIG3H, CCP2MX_PORTC_3 & PBADEN_OFF_3 'ifdef DEBUG@REQ ; DO we require DEBUG ? '__config CONFIG4L, STVREN_ON_4 & LVP_OFF_4 & XINST_OFF_4 & DEBUG_ON_4 'ELSE '__config CONFIG4L, STVREN_ON_4 & LVP_OFF_4 & XINST_OFF_4 & DEBUG_OFF_4 'endif '__config CONFIG5L, CP0_OFF_5 & CP1_OFF_5 & CP2_OFF_5 '__config CONFIG5H, CPB_OFF_5 & CPB_OFF_5 '__config CONFIG6L, WRT0_OFF_6 & WRT1_OFF_6 & WRT2_OFF_6 '__config CONFIG6H, WRTC_OFF_6 & WRTB_OFF_6 & WRTD_OFF_6 '__config CONFIG7L, EBTR0_OFF_7 & EBTR1_OFF_7 & EBTR2_OFF_7 '__config CONFIG7H, EBTRB_OFF_7 'endif '[DEFCONFIGEND]